S3394
Product Brief
SONET/SDH/FEC OC-192 Receiver with EDC Technology
PB1642_v1.01_11/05/03
Overview
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Description
The S3394 SONET/SDH/FEC Receiver
device is one of the latest additions to
the AMCC DispersionXXTM product
family. This device provides full
deserialization capabilities for OC-192
applications and is suitable for
Metropolitan, Long-Haul, Ultra LongHaul, and Dense Wavelength Division
Multiplexing (DWDM) networks. The
device performs all necessary serial-toparallel functions in conformance with
the SONET/SDH transmission
standards. The standard operating range
is from 9.9 to 11.3 Gbps. AMCCs
proprietary DispersionXXTM technology
allows system designers to optimize
coding gain without additional overhead
expansion beyond the standard FEC
data rate of 10.7 Gbps.
The S3394 device can be used to
implement the front end of SONET/SDH/
FEC equipment which consists primarily
of the serial receive interface. The
system timing circuitry consists of a highspeed phase detector, clock dividers,
and clock distribution. The devices utilize
on-chip clock synthesis PLL components
that allow the use of a slower external
clock references, 155.52 or 622.08 (plus
FEC rate) MHz, in support of existing
system clocking schemes. The low-jitter,
16-bit, Low Voltage Differential Signaling
(LVDS) interfaces guarantee compliance
with the bit-error rate requirements of the
Telcordia and ITU-T standards.
AMCC Suggested Interface Devices
Verrazano
(S2509)
Quad SONET/SDH/Digital Wrapper
Backplane Serdes
Ganges II
(S19202)
STS-192 SONET/SDH Framer
Hudson II
(S19203)
Digital Wrapper - FEC (7% Overhead)
Mekong
(S19204)
STS-192 SONET/SDH MUX/
DeMUX with PP
Khatanga
(S19205)
10 GbE MAC and PHY/STS-192c
POS Framer & Mapper
Niagara
(S19208)
Digital Wrapper/Enhanced FEC
(7% Overhead)
Figure 1, System Block Diagram, shows
a typical system configuration for the
S3394 device.
–
At a Glance
–
General Features
• Operational data rates at 9.9 to
11.3 Gbps
• Selectable Electrical RZ or NRZ
Modulation
• Dispersion (ISI) compensation
• Robust CRU – can extract clock
in low OSNR environments
• 16-bit OIF Compliant LVDS Data
Path with Programmable Bit
Swap
• Integrated low pass filter (coarse/
fine adjust).
• Peak detector for input power
monitoring (SSI - Signal Strength
Indicator)
• Threshold and phase adjust
capability
• Sensitivity 6.0 mV (p-p, SE)
• External phase adjust ± 0.30 UI
• Linearity gain control – variable
gain adjust
• Selectable reference frequency of
155.52 or 622.08 MHz (or various
protocol (+FEC))
• Complies with Telcordia/ITU-T/
OIF specifications
• 3.3 V and 1.8 V power supplies
• Compact 15 mm x 15 mm 196 Pin
CBGA Package
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S3394
RX
A MCC
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OTX
ORX
ORX
OTX
A MCC
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AM CC
S3394
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Figure 1. System Block Diagram
Empowering Intelligent Optical Networks
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