TC74AC245,640P/F/FT
TOSHIBA CMOS Digital Integrated Circuit
Silicon Monolithic
TC74AC245P, TC74AC245F, TC74AC245FT
TC74AC640P, TC74AC640F, TC74AC640FT
Octal Bus Transceiver
TC74AC245P/F/FT 3-State, Non-Inverting
TC74AC640P/F/FT 3-State, Inverting
The TC74AC245, 640 are advanced high speed CMOS OCTAL
BUS TRANSCEIVERs fabricated with silicon gate and double-layer
metal wiring C2MOS technology.
They achieve the high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low power
dissipation.
They are intended for two-way asynchronous communication
between data busses. The direction of data transmission is
determined by the level of the DIR input.
The enable input ( G ) can be used to disable the device so that
the busses are effectively isolated.
All inputs are equipped with protection circuits against static
discharge or transient excess voltage.
Features (Note 1)(Note 2)
•
High noise immunity: VNIH = VNIL = 28% VCC (min)
•
TC74AC245FT, TC74AC640FT
Low power dissipation: ICC = 8 μA (max) at Ta = 25°C
•
TC74AC245F, TC74AC640F
High speed: tpd = 3.9 ns (typ.) at VCC = 5 V
•
TC74AC245P, TC74AC640P
•
Symmetrical output impedance:
|IOH| = IOL = 24 mA (min)
Capability of driving 50 Ω transmission lines.
∼
Balanced propagation delays: tpLH − tpHL
•
Wide operating voltage range: VCC (opr) = 2 V to 5.5 V
•
Pin and function compatible with 74F245/640
Weight
DIP20-P-300-2.54A
SOP20-P-300-1.27A
TSSOP20-P-0044-0.65A
: 1.30 g (typ.)
: 0.22 g (typ.)
: 0.08 g (typ.)
Note 1: Do not apply a signal to any bus terminal when it is in
the output mode. Damage may result.
Note 2: All floating (high impedance) bus terminals must have their input levels fixed by means of pull up or pull
down resistors.
Start of commercial production
1986-05
1
2014-03-01
