DATA SHEET
SILICON POWER TRANSISTOR
2SA1400-Z
PNP SILICON TRIPLE DIFFUSED TRANSISTOR
PACKAGE DRAWING (Unit: mm)
The 2SA1400-Z is designed for High Voltage Switching, especially in
+0.2
6.5 ±0.2
5.0 ±0.2
4
5.5 ±0.2
• High Voltage: VCEO = −400 V
• High Speed: tf ≤ 1.0 μs
• Complement to 2SC3588-Z
1 2 3
Note
5.6 ±0.3
FEATURES
2.3 ±0.2
0.5 ±0.1
Note
9.5 ±0.5
4.4 ±0.2
1.0 ±0.5
0.4 MIN.
0.5 TYP.
2.5 ±0.5
Hybrid Integrated Circuits.
1.5 −0.1
DESCRIPTION
0.5 ±0.1
ABSOLUTE MAXIMUM RATINGS (TA = 25°C)
0.5 ±0.1
2.3 ±0.3
Collector to base voltage
VCBO
−400
V
Collector to emitter voltage
VCEO
−400
V
Base to emitter voltage
VEBO
−7
V
IC(DC)
−0.5
A
IC(pulse)
−1.0
2.0
W
Junction temperature
Tj
150
°C
Storage temperature
Tstg
−55 to +150
0.15 ±0.15
A
PT
2.3 ±0.3
°C
Collector current (DC)
Collector current (pulse)
Note 1
Total power dissipation (TA = 25°C)
Note 2
TO-252 (MP-3Z)
1.
2.
3.
4.
Base
Collector
Emitter
Collector Fin
Note The depth of notch at the top of the fin is
from 0 to 0.2 mm.
Notes 1. PW ≤ 300 μs, Duty Cycle ≤ 10%
2
2. When mounted on ceramic substrate of 7.5 cm × 0.7 mm
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. D18249EJ3V0DS00 (3rd edition)
(Previous No. TC-1633A)
Date Published June 2006 NS CP(K)
Printed in Japan
The mark shows major revised points.
The revised points can be easily searched by copying an "" in the PDF file and specifying it in the "Find what:" field.
1985, 2006
