Obsolete - Not Recommended for New Designs
U63716
CapStore 2K x 8 nvSRAM
Features
Description
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The U63716 has two separate
modes of operation: SRAM mode
and nonvolatile mode. In SRAM
mode, the memory operates as an
ordinary static RAM. In non-volatile
operation, data is transferred in
parallel from SRAM to EEPROM or
from EEPROM to SRAM. In this
mode SRAM functions are disabled.
The U63716 is a static RAM with a
non-volatile electrically erasable
PROM (EEPROM) element incorporated in each static memory cell.
The SRAM can be read and written
an unlimited number of times, while
independent nonvolatile data resides in EEPROM. Data transfers
from the SRAM to the EEPROM
(the STORE operation) take place
automatically upon power down
using charge stored in an integrated capacitor. Transfers from the
EEPROM to the SRAM (the
RECALL operation) take place
automatically on power up. The
U63716 combines the ease of use
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CMOS non- volatile static RAM
2048 x 8 bits
70 ns Access Time
35 ns Output Enable Access Time
ICC = 15 mA at 200 ns Cycle Time
Unlimited Read and Write Cycles
to SRAM
Automatic STORE to EEPROM
on Power Down using charge
stored in an integrated capacitor
Software initiated STORE
Automatic STORE Timing
106 STORE cycles to EEPROM
100 years data retention in
EEPROM
Automatic RECALL on Power Up
Software RECALL Initiation
Unlimited RECALL cycles from
EEPROM
Single 5 V ± 10 % Operation
Operating temperature range:
0 to 70 °C
-40 to 85 °C
QS 9000 Quality Standard
ESD protection > 2000 V
(MIL STD 883C M3015.7)
RoHS compliance and Pb- free
Package: PDIP24 (600 mil)
of an SRAM with nonvolatile data
integrity.
Pin Configuration
A7
1
A6
A5
STORE cycles also may be initiated under user control via a software sequence.
Once a STORE cycle is initiated,
further input or output are disabled
until the cycle is completed.
Because a sequence of addresses
is used for STORE initiation, it is
important that no other read or
write accesses intervene in the
sequence or the sequence will be
aborted.
RECALL cycles may also be initiated by a software sequence.
Internally, RECALL is a two step
procedure. First, the SRAM data is
cleared and second, the nonvolatile information is transferred into
the SRAM cells.
The RECALL operation in no way
alters the data in the EEPROM
cells. The nonvolatile data can be
recalled an unlimited number of
times.
The U63716 is pin compatible with
standard SRAMs and standard battery backed SRAMs.
Pin Description
VCC
2
24
23
3
22
A9
A4
4
21
W
A3
5
20
A2
6
A1
7
A8
Signal Name
Signal Description
A0 - A10
Address Inputs
G
DQ0 - DQ7
Data In/Out
PDIP 19
24
18
A10
E
Chip Enable
E
G
Output Enable
W
VCC
Write Enable
Power Supply Voltage
VSS
Ground
A0
8
17
DQ7
DQ0
9
16
DQ6
DQ1
10
15
DQ5
DQ2
11
14
DQ4
VSS
12
13
DQ3
Top View
March 31, 2006
STK Control #ML0053
1
Rev 1.0
