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Spartan-3AN FPGA Family Data Sheet
DS557 April 1, 2011
Product Specification
Module 1:
Introduction and Ordering Information
Module 3:
DC and Switching Characteristics
DS557 (v4.1) April 1, 2011
DS557 (v4.1) April 1, 2011
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Introduction
Features
Architectural Overview
Configuration Overview
In-system Flash Memory Overview
General I/O Capabilities
Supported Packages and Package Marking
Ordering Information
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Module 2:
Functional Description
DS557 (v4.1) April 1, 2011
The functionality of the Spartan®-3AN FPGA family is
described in the following documents:
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DS557 (v4.1) April 1, 2011
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Pin Descriptions
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Package Overview
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Pinout Tables
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Footprint Diagrams
Table 1: Production Status of Spartan-3AN FPGAs
Distributed RAM
SRL16 Shift Registers
Carry and Arithmetic Logic
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I/O Resources
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Embedded Multiplier Blocks
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Programmable Interconnect
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ISE® Design Tools and IP Cores
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Embedded Processing and Control Solutions
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Pin Types and Package Overview
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Package Drawings
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Powering FPGAs
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Power Management
UG332: Spartan-3 Generation Configuration User Guide
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Configuration Overview
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Configuration Pins and Behavior
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Bitstream Sizes
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Detailed Descriptions by Mode
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Module 4:
Pinout Descriptions
UG331: Spartan-3 Generation FPGA User Guide
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Clocking Resources
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Digital Clock Managers (DCMs)
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Block RAM
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Configurable Logic Blocks (CLBs)
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DC Electrical Characteristics
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Absolute Maximum Ratings
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Supply Voltage Specifications
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Recommended Operating Conditions
Switching Characteristics
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I/O Timing
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Configurable Logic Block (CLB) Timing
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Multiplier Timing
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Block RAM Timing
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Digital Clock Manager (DCM) Timing
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Suspend Mode Timing
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Device DNA Timing
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Configuration and JTAG Timing
Spartan-3AN FPGA
Status
XC3S50AN
Production
XC3S200AN
Production
XC3S400AN
Production
XC3S700AN
Production
XC3S1400AN
Production
Additional information on the Spartan-3AN family can be
found at http://www.xilinx.com/products/spartan3a/3an.htm.
Self-contained In-System Flash mode
Master Serial Mode using Platform Flash PROM
Master SPI Mode using Commodity Serial Flash
Master BPI Mode using Commodity Parallel Flash
Slave Parallel (SelectMAP) using a Processor
Slave Serial using a Processor
JTAG Mode
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ISE iMPACT Programming Examples
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MultiBoot Reconfiguration
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Design Authentication using Device DNA
UG333: Spartan-3AN In-System Flash User Guide
UG334: Spartan-3AN Starter Kit User Guide
© Copyright 2007–2011 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, and other designated brands included herein are trademarks of Xilinx in the United States and
other countries. PCI and PCI-X are trademarks of PCI-SIG and used under license. All other trademarks are the property of their respective owners.
DS557 April 1, 2011
Product Specification
www.xilinx.com
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