MC74HC589A
8-Bit Serial or
Parallel-Input/Serial-Output
Shift Register with 3-State
Output
http://onsemi.com
High−Performance Silicon−Gate CMOS
The MC74HC589A device consists of an 8−bit storage latch which
feeds parallel data to an 8−bit shift register. Data can also be loaded
serially (see the Function Table). The shift register output, QH, is a
3−state output, allowing this device to be used in bus−oriented
systems.
The HC589A directly interfaces with the SPI serial data port on
CMOS MPUs and MCUs.
MARKING
DIAGRAMS
PDIP−16
N SUFFIX
CASE 648
16
1
16
1
Features
•
•
•
•
•
•
•
•
•
Output Drive Capability: 15 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1 mA
High Noise Immunity Characteristic of CMOS Devices
In Compliance with the Requirements Defined by JEDEC
Standard No. 7 A
Chip Complexity: 526 FETs or 131.5 Equivalent Gates
These Devices are Pb−Free, Halogen Free and are RoHS Compliant
NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
MC74HC589AN
AWLYYWWG
SOIC−16
D SUFFIX
CASE 751B
16
1
16
HC589AG
AWLYWW
1
16
HC
589A
ALYWG
G
TSSOP−16
DT SUFFIX
CASE 948F
16
1
1
16
SOEIAJ−16
F SUFFIX
CASE 966
16
1
74HC589A
ALYWG
1
A
WL, L
YY, Y
WW, W
G
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
© Semiconductor Components Industries, LLC, 2013
July, 2013 − Rev. 6
1
Publication Order Number:
MC74HC589A/D
