SSM3J332R
TOSHIBA Field-Effect Transistor Silicon P-Channel MOS Type (U-MOSVI)
SSM3J332R
○Power Management Switch Applications
Unit: mm
+0.08
0.05 M A
144 mΩ (max) (@VGS = -1.8 V)
72.0 mΩ (max) (@VGS = -2.5 V)
50.0 mΩ (max) (@VGS = -4.5 V)
42.0 mΩ (max) (@VGS = -10 V)
0.42 -0.05
3
1
2
0.95
Absolute Maximum Ratings (Ta = 25°C)
0.95
2.9±0.2
Characteristic
Symbol
+0.08
0.17 -0.07
2.4±0.1
1.8-V drive
Low ON-resistance: RDS(ON) =
RDS(ON) =
RDS(ON) =
RDS(ON) =
1.8±0.1
•
•
Rating
Unit
VDSS
-30
V
Gate-Source voltage
VGSS
± 12
V
DC
Drain current
Pulse
ID (Note 1)
-6.0
IDP (Note 1,2)
-24.0
PD (Note 3)
Power dissipation
A
1
t < 10s
0.8+0.08
-0.05
Drain-Source voltage
A
1: Gate
2: Source
3: Drain
W
2
Channel temperature
Tch
150
°C
Storage temperature range
Tstg
-55 to 150
SOT-23F
°C
JEDEC
―
Note: Using continuously under heavy loads (e.g. the application of high
JEITA
―
temperature/current/voltage and the significant change in
TOSHIBA
2-3Z1A
temperature, etc.) may cause this product to decrease in the
reliability significantly even if the operating conditions (i.e.
Weight: 11 mg (typ.)
operating temperature/current/voltage, etc.) are within the
absolute maximum ratings.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Note 1: The channel temperature should not exceed 150°C during use.
Note 2: PW ≤ 1ms, Duty ≤ 1%
Note 3: Mounted on FR4 board.
(25.4 mm × 25.4 mm × 1.6 mm, Cu Pad: 645 mm2)
Marking
Equivalent Circuit (Top View)
3
3
KFJ
1
2
1
2
Start of commercial production
2010-08
1
2014-12-19
