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部品型式

REF195GS

製品説明
仕様・特性

Data Sheet Precision Micropower, Low Dropout Voltage References REF19x Series FEATURES TEST PINS Temperature coefficient: 5 ppm/°C maximum High output current: 30 mA Low supply current: 45 μA maximum Initial accuracy: ±2 mV maximum 1 Sleep mode: 15 μA maximum Low dropout voltage Load regulation: 4 ppm/mA Line regulation: 4 ppm/V Short-circuit protection Test Pin 1 and Test Pin 5 are reserved for in-package Zener zap. To achieve the highest level of accuracy at the output, the Zener zapping technique is used to trim the output voltage. Because each unit may require a different amount of adjustment, the resistance value at the test pins varies widely from pin to pin and from part to part. The user should leave Pin 1 and Pin 5 unconnected. TP 1 VS 2 REF19x SERIES 8 NC 7 NC SLEEP 3 APPLICATIONS Portable instruments ADCs and DACs Smart sensors Solar powered applications Loop-current-powered instruments NOTES 1. NC = NO CONNECT. 2. TP PINS ARE FACTORY TEST POINTS, NO USER CONNECTION. Figure 1. 8-Lead SOIC_N and TSSOP Pin Configuration (S Suffix and RU Suffix) TP 1 VS 2 GENERAL DESCRIPTION SLEEP 3 The REF19x series references are specified over the extended industrial temperature range (−40°C to +85°C) with typical performance specifications over −40°C to +125°C for applications, such as automotive. REF19x SERIES 8 NC 7 NC NOTES 1. NC = NO CONNECT. 2. TP PINS ARE FACTORY TEST POINTS, NO USER CONNECTION. 00371-002 6 OUTPUT TOP VIEW GND 4 (Not to Scale) 5 TP The REF19x series precision band gap voltage references use a patented temperature drift curvature correction circuit and laser trimming of highly stable, thin-film resistors to achieve a very low temperature coefficient and high initial accuracy. The REF19x series is made up of micropower, low dropout voltage (LDV) devices, providing stable output voltage from supplies as low as 100 mV above the output voltage and consuming less than 45 μA of supply current. In sleep mode, which is enabled by applying a low TTL or CMOS level to the SLEEP pin, the output is turned off and supply current is further reduced to less than 15 μA. 00371-001 6 OUTPUT TOP VIEW GND 4 (Not to Scale) 5 TP Figure 2. 8-Lead PDIP Pin Configuration (P Suffix) Table 1. Nominal Output Voltage Part Number REF191 REF192 REF193 REF194 REF195 REF196 REF198 Nominal Output Voltage (V) 2.048 2.50 3.00 4.50 5.00 3.30 4.096 All electrical grades are available in an 8-lead SOIC package; the PDIP and TSSOP packages are available only in the lowest electrical grade. 1 Initial accuracy does not include shift due to solder heat effect (see the Applications Information section). Rev. L Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©1996–2011 Analog Devices, Inc. All rights reserved.

ブランド

AD

会社名

Analog Devices

本社国名

U.S.A

事業概要

半導体デバイスを製造するアメリカの多国籍企業。特にADC、DAC、MEMS、DSPなどに強い。現在は 65nm から 3μm のプロセスルールの回路を設計している。

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