STLC2500C
BluetoothTM EDR Single Chip
DATA BRIEF
Features
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The lowest power consumption by design and
technology (see Table 1)
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World best EDR throughput (see Table 1)
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World most performing BT-WLAN coexistence
support for several BT/WLAN coexistence
algorithms (i.e. 2/3/4-wire PTA, in a very
flexible and parametrical way to optimize voice
and data quality over Bluetooth and WLAN)
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Communication interfaces
– Fast UART up to 4Mbps for HCI
– SPI interface up to 6 Mbps for HCI
– PCM interface for voice
– WirelessLAN coexistence with 2, 3, 4 wires
– 19 programmable GPIOs
– Fast master I2C interface
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Ciphering support up to 128-bit keys
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Software support up to HCI stack
– H4 and H5 HCI transport layer
– HCI proprietary commands and single HCI
command for patch/upgrade download
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Internal power management
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Supports 1.65V to 2.85 Volts IO systems
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Seven external components: six decoupling
capacitors and one single antenna interface
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Extended range
– Tx output power up to 8 dBm
On-chip RAM, on-chip ROM
Ultra low power architecture with 3 different low
power modes: sleep , deep sleep and
complete power down
Superior voice quality
– Pitch-Period Error Concealment (PPEC) for
improved speech quality (in the vicinity of
interference)
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WFBGA48 (4.5mm x 4.5 mmx 0.8 mm)
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Pre-calibrated RF
– Auto calibration (VCO, filters), no RF
calibration required in production
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Bluetooth™V2.0 + EDR compliant
– Full EDR support and all BT1.2 errata
– All EDR data rates and packet types
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Backward compatibility with legacy devices
through extended V1.2 feature support
– Adaptive Frequency Hopping (AFH)
– Faster connections through interlaced scan
– Extended SCO (eSCO) links
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Asynchronous Connection-Less (ACL) logical
transport link
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Synchronous Connection Oriented (SCO) link
for 2 simultaneous SCO channels at 64Kbps
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Clock support for all cellular standards: system
clock input and low power clock
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ARM7TDMI CPU with 32-bit core and AMBA
(AHB-APB) bus configuration
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Description
Point-to-point, point-to-multi-point
(up to 7 slaves) and scatternet capability
Patch RAM capability
January 2006
The STLC2500C is a single chip ROM-based
Bluetooth solution implemented in 0.13 µm ultra
low power, ultra low leakage CMOS technology
for mobile terminal applications requiring
integration up to HCI level. Patch RAM is
available, enabling multiple patches/upgrades.
The STLC2500C offers multiple interface options.
The radio has been designed specifically for
single chip requirements for minimal consumption
and BOM count.
Rev 1
For further information contact your local STMicroelectronics sales office.
1/4
www.st.com
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