Features
• Pixel Size: 13 µm x 13 µm (13 µm pitch)
• High Data Output Rate: 20 MHz typ
• High Responsivity and Resolution over a Wide Spectral Range: from Blue (400 nm) up
to Near Infrared (1100 nm)
• Improved Dark Signal and Photo Response Uniformity
• Low Temporal Noise and High Dynamic Range: Over 6000/1
• Ease and Flexibility of Operation:
– Only two External Basic Drive Clocks
– Internal or External Sample and Reset Clocks
• 24-lead DIL Package
Pin Identification
Pin Number
Symbol
Designation
1
VOSA
Video Output Signal A (Odd Channel)
2
ΦECHA
A Channel Sample-and-hold Gate Input
3
SΦECHA
A Channel Internal Sample Clock-output
4
ΦRA
A Channel External Reset Clock Input
8
VDD
Output Amplifier Drain And Internal Logic Supply
9
TP3
Test Point 3
10
TP2
Test Point 2
11
VT
Register And Photosensitive Zone DC Bias
12
TP1
Test Point 1
13
VSS
Substrate Bias (Ground)
15
ΦP
Transfer Clock
16
ΦT
Register Transport Clock
17
VGS
Output Gate DC Bias
18
ΦRB
B Channel External Reset Clock Input
19
VINH
Internal Sample Clock Inhibition
21
SΦECHB
B Channel Internal Sample Clock Input
22
ΦECHB
B Channel Sample-and-hold Gate Input
23
VOSB
Video Output Signal B (Even Channel)
24
VDR
Reset DC Bias
5, 6, 7, 14, 20
DNC
Linear Charged
Couple Device
(CCD) Image
Sensor 1024
Pixels
Do Not Connected
VOSA
ECHA
S ECHA
RA
DNC
DNC
DNC
VDD
TP3
TP2
VT
TP1
1
24
2
23
3
22
4
21
5
20
6
19
TH7804A
7
18
8
17
9
16
10
15
11
14
12
13
TH7804A
VDR
VOSB
ECHB
S ECHB
DNC
VINH
RB
VGS
T
P
DNC
VSS
Rev. 1989A–IMAGE–05/02
1
