ACE9050
System Controller and Data Modem
Data Sheet
March 2008
Features
• Low Power, Low Voltage (3·6 to 5·0 V) Operation
• 3·0V Memory Interface
• Power Down and Emulation Modes
• 6303R-type Microcontroller
• AMPS or TACS Modem
• Watchdog and Power Control Logic
• SAT Detection, Generation and Loopback
• 6K bytes RAM
• Interface to FLASH and EEPROM Memories
• 512 byte ROM Boot Block
• I/O Ports for Keyboard Scanning
• I2C Controller
• Small Outline 100-pin package
Applications
• AMPS and ETACS Cellular Telephones
• Two-way Radio Systems
Related Products
The ACE9050 is part of Zarlink Semiconductor's ACE chipset,
together with the following:
ACE9020 Receiver and Transmitter interface
ACE9030 Radio Interface and Twin Synthesiser
ACE9040 Audio Processor
Absolute Maximum Ratings
Supply voltages VDD, VDDM
Storage temperature
Operating temperature
Voltage on any pin
20·5V to 16V
255°C to 1150°C
240°C to 185°C
VSS20·5V to VDD 10·5V
Ordering Information
Industrial Temperature Range
LQFP 100-lead 14x14 mm, 0.5 mm pitch package (FP100)
Tape & Reel
LATC H3
SERV
SYNTHCLK
SYNTHDATA
INRQ0
INRQ1
KPI [3]
KPI [2]
KPI [1]
KPI [0]
VDD
VDD
TXDATA
TXSAT
TXPOW
AFC/RXDATA
KPO [4]
KPO [3]
KPO [2]
KPO [1]
KPO [0]
INP1[4]
INP1[3]
INP1[2]
RXSAT
ACE9050C/IW/FP8Q 100 Pin LQFP
OUTP2 [6]
ICN
LATCH1
OUTP2 [7]
LATCH0
PWM2
DTFG
EMUL
IRQN
POFFN
VSS
VSS
VDD
EXRESN
C1008
MRN
A15
A14
CPUCL
R/W
BAR
DTMS
PWM1
ECLK
RXCD
75
76
51
50
BA17
BA16
BA15
BA14
A13
A12
A11
A10
A9
A8
A7
A6
VDDM
VSS
VSS
A5
A4
A3
A2
A1
A0
CSE2N
CSEPN
WEN
OEN
ACE9050
100
1
26
25
TESTN
XIN
XOUT
DFMS
AS
BAUDCLK
P1 [7]
P1 [6]
SCL/P1 [4]
VSS
VDD
P1 [5]
SDA/P1 [3]
P1 [2]
P1 [1]
P1 [0]
VSS
D7
D6
D5
D4
D3
D2
D1
D0
The ACE9050 provides the control and interface functions
needed for AMPS or TACS analog cellular handsets. The
device has been designed using Zarlink Semiconductor submicron CMOS technology for low power and high performance.
The ACE9050 contains an embedded microcontroller
and peripheral functions. The controller is of the 6303 type
with a Serial Communication Interface, Timer, ROM and
RAM. The peripheral functions are: Data Modem, SAT
Management, Serial Chip Interfaces, I 2C Interface, two Pulse
Width Modulators, IFC Counter, Tone generator, I/O ports,
Watchdog and Crystal Oscillator.
Several power down modes are incorporated in the device
as is a processor emulation mode for software and system
development.
An index to this data sheet is given on pages 49 and 50.
FP100
Figure 1 - Pin connections - top view. Pin 1 is identified by
moulded spot and by coding orientation. See Table 1 for
detailed pin descriptions.
CLOCK
&
BAUD
GENERATOR
MEMORY
INTERFACE
WATCHDOG
&
POWER
CONTROL
I/O
PORTS
KEYPAD
INTERFACE
ACEBus
INTERFACE
6303R
MICROPROCESSOR
UART (SCI)
TIMER
I/O PORTS
0¥5K
ROM
6K
RAM
I2C BUS
INTERFACE
23PULSE
WIDTH
MODULATOR
INTERRUPT
CONTROL
AMPS / TACS
DATA MODEM
IFC
COUNTER
TONE
GENERATOR
SAT
MANAGEMENT
Figure 2 - ACE9050 simplified block diagram
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 2007-2008, Zarlink Semiconductor Inc. All Rights Reserved.
