a
MultiPort Internet
Gateway Processor
ADSP-21mod980
FEATURES
PERFORMANCE
Complete Single-Chip MultiPort Internet Gateway
Processor (No External Memory Required)
Implements Sixteen Modem Channels or Forty Voice
Channels in One Package
Each Processor Can Implement One V.34/V.90 Data/
Fax Modem (Includes Datapump and Controller)
Standard Power Version: 600 MIPS Sustained Performance, 13.3 ns Instruction Time @ 2.75 V (Internal)
Low Power Version: 600 MIPS Sustained Performance,
13.3 ns Instruction Time @ 1.80 V (Internal)
Open Architecture Extensible to Voice-over-Network
(VoN) and Other Applications
Low Power Dissipation, 45 mW (Typical) Per Channel
Power-Down Mode Featuring Low CMOS Standby
Power Dissipation
INTEGRATION
ADSP-2100 Family Code-Compatible, with Instruction
Set Extensions
2.00M Bytes of On-Chip SRAM, Configured as 1.125M
Bytes of Program Memory and 0.875M Bytes of Data
Memory
Dual-Purpose Program Memory, for Both Instruction
and Data Storage
352-Ball PBGA with a 1.9 Square Inch (1225 Square mm)
Footprint
SYSTEM CONFIGURATION
16-Bit Internal DMA Port for High-Speed Access to
On-Chip Memory (Mode-Selectable)
Programmable Multichannel Serial Port Supports
24/32 Channels
Two Double-Buffered Serial Ports with Companding
Hardware and Automatic Data Buffering
Separate RESET Pins for Each Internal Processor
FUNCTIONAL BLOCK DIAGRAM
DATA<23:8>,
A<0>
17
CLKIN
IAD<15:0>,
IDMA CNTL
PF<0:2>
/MODE A:C
20
20
218x
1
SPORT0A
SPORT1
EMULATOR
IAD<15:0>,
IDMA CNTL
3
218x
2
218x
3
218x
4
4
218x
5
218x
6
218x
7
218x
8
4
SPORT0B
4
8
REV. 0
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© Analog Devices, Inc., 2000