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DS1225-150

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仕様・特性

Not Recommended for New Design DS1225Y 64k Nonvolatile SRAM www.maxim-ic.com FEATURES § § § § § § § § § PIN ASSIGNMENT 10 years minimum data retention in the absence of external power Data is automatically protected during power loss Directly replaces 2k x 8 volatile static RAM or EEPROM Unlimited write cycles Low-power CMOS JEDEC standard 28-pin DIP package Read and write access times as fast as 150 ns Full ±10% operating range Optional industrial temperature range of -40°C to +85°C, designated IND 28 27 26 25 24 23 22 21 20 19 18 17 VCC WE NC A8 A9 A11 OE A10 CE DQ7 DQ6 DQ1 1 2 3 4 5 6 7 8 9 10 11 12 DQ2 13 16 DQ4 GND 14 15 DQ3 NC A12 A7 A6 A5 A4 A3 A2 A1 A0 DQ0 DQ5 24-Pin ENCAPSULATED PACKAGE 720-mil EXTENDED PIN DESCRIPTION A0-A12 DQ0-DQ7 CE WE OE VCC GND - Address Inputs - Data In/Data Out - Chip Enable - Write Enable - Output Enable - Power (+5V) - Ground DESCRIPTION The DS1225Y 64k Nonvolatile SRAM is a 65,536-bit, fully static, nonvolatile RAM organized as 8192 words by 8 bits. Each NV SRAM has a self-contained lithium energy source and control circuitry which constantly monitors VCC for an out-of-tolerance condition. When such a condition occurs, the lithium energy source is automatically switched on and write protection is unconditionally enabled to prevent data corruption. The NV SRAM can be used in place of existing 8k x 8 SRAMs directly conforming to the popular bytewide 28-pin DIP standard. The DS1225Y also matches the pinout of the 2764 EPROM or the 2864 EEPROM, allowing direct substitution while enhancing performance. There is no limit on the number of write cycles that can be executed and no additional support circuitry is required for microprocessor interfacing. 1 of 8 091401

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