DS2152
Enhanced T1 Single-Chip Transceiver
www.maxim-ic.com
FEATURES
PIN CONFIGURATION
TOP VIEW
DS2152
100
Complete DS1/ISDN-PRI Transceiver
Functionality
Line Interface can Handle Both Long- and
Short-Haul Trunks
32-Bit or 128-Bit Crystal-Less Jitter
Attenuator
Generates DSX-1 and CSU Line Build-Outs
Frames to D4, ESF, and SLC-96R Formats
Dual On-Board Two-Frame Elastic Store Slip
Buffers That can Connect to Asynchronous
Backplanes Up to 8.192MHz
8-Bit Parallel Control Port That can be Used
Directly on Either Multiplexed or
Nonmultiplexed Buses (Intel or Motorola)
Extracts and Inserts Robbed-Bit Signaling
Detects and Generates Yellow (RAI) and
Blue (AIS) Alarms
Programmable Output Clocks for Fractional
T1
Fully Independent Transmit and Receive
Functionality
Integral HDLC Controller with 16-Byte
Buffers for the FDL
Generates and Detects In-Band Loop Codes
from 1 to 8 bits in Length Including CSU
Loop Codes
Contains ANSI Ones Density Monitor and
Enforcer
Large Path and Line Error Counters Including
BPV, CV, CRC6, and Framing Bit Errors
Pin Compatible with DS2154 E1 Enhanced
Single-Chip Transceiver
5V Supply; Low-Power CMOS
100-Pin, 14mm2 LQFP Package
1
LQFP
(14mm x 14mm)
ORDERING INFORMATION
PART
DS2152L
DS2152L+
DS2152LN
DS2152LN+
TEMP
RANGE
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
PINPACKAGE
100 LQFP
100 LQFP
100 LQFP
100 LQFP
+Denotes lead-free/RoHS-compliant package.
Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device
may be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata.
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REV: 011706
