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部品型式

KU82596

製品説明
仕様・特性

82596CA HIGH-PERFORMANCE 32-BIT LOCAL AREA NETWORK COPROCESSOR ✹ ✹ ✹ ✹ Performs Complete CSMA/CD Medium Access Control (MAC) Functions— Independently of CPU — IEEE 802.3 (EOC) Frame Delimiting ✹ Supports Industry Standard LANs — IEEE TYPE 10BASE-T, IEEE TYPE 10BASE5 (Ethernet), IEEE TYPE 10BASE2, IEEE TYPE 1BASE5 (StarLAN*), and the Proposed Standard 10BASE-F — Proprietary CSMA/CD Networks Up to 20 Mb/s ✹ On-Chip Memory Management — Automatic Buffer Chaining — Buffer Reclamation after Receipt of Bad Frames; Optional Save Bad Frames — 32-Bit Segmented or Linear (Flat) Memory Addressing Formats ✹ Network Management and Diagnostics — Monitor Mode — 32-Bit Statistical Counters ✹ 82586 Software Compatible ✹ ✹ ✹ Optimized CPU Interface — Optimized Bus Interface to Intel i486 TM DX, i486 TM SX, i487SX and 80960CA Processors — 33 MHz, 25 MHz, 20 MHz and 16 MHz Clock Frequencies — Supports Big Endian and Little Endian Byte Ordering 32-Bit Bus Master Interface — 106 MB/s Bus Bandwidth — Burst Bus Transfers — Bus Throttle Timers — Transfers Data at 100% of Serial Bandwidth — 128-Byte Receive FIFO, 64-Byte Transmit FIFO Configurable Initialization Root for Data Structures High-Speed, 5V, CHMOS IV Technology 132-Pin Plastic Quad Flat Pack (PQFP) and PGA Package (See Packaging Spec Order No. 240800-001, Package Type KU and A) Self-Test Diagnostics 290218 –1 Figure 1? 82596CA Block Diagram

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