IS93C56A IS93C66A
2K-BIT/4K-BIT SERIAL ELECTRICALLY
ERASABLE PROM
AUGUST 2007
FEATURES
DESCRIPTION
• Industry-standard Microwire Interface
— Non-volatile data storage
— Wide voltage operation:
Vcc = 1.8V to 5.5V
— Auto increment for efficient data dump
• User Configured Memory Organization
— By 16-bit or by 8-bit
• Hardware and software write protection
— Defaults to write-disabled state at power-up
— Software instructions for write-enable/disable
• Enhanced low voltage CMOS E2PROM
technology
• Versatile, easy-to-use Interface
— Self-timed programming cycle
— Automatic erase-before-write
— Programming status indicator
— Word and chip erasable
— Chip select enables power savings
• Durable and reliable
— 40-year data retention after 1M write cycles
— 1 million write cycles
— Unlimited read cycles
— Schmitt-trigger inputs
• Industrial and Automotive Temperature Grade
• Lead-free available
The IS93C56A/66A are 2kb/4kb non-volatile,
ISSI ® serial EEPROMs. They are fabricated using
an enhanced CMOS design and process. The
IS93C56A/66A contain power-efficient read/write
memory, and organization of either 256/512 bytes
of 8 bits or 128/256 words of 16 bits. When the
ORG pin is connected to Vcc or left unconnected,
x16 is selected; when it is connected to ground,
x8 is selected. The IS93C56A/66A are fully
backward compatible with IS93C56/66.
An instruction set defines the operation of the
devices, including read, write, and mode-enable
functions. To protect against inadvertent data
modification, all erase and write instructions are
accepted only while the devices are write-enabled.
A selected x8 byte or x16 word can be modified
with a single WRITE or ERASE instruction.
Additionally, the two instructions WRITE ALL or
ERASE ALL can program an entire array. Once a
device begins its self-timed program procedure,
the data out pin (Dout) can indicate the READY/
BUSY status by raising chip select (CS). The selftimed write cycle includes an automatic erasebefore-write capability. The devices can output
any number of consecutive bytes/words using a
single READ instruction.
FUNCTIONAL BLOCK DIAGRAM
DATA
REGISTER
INSTRUCTION
REGISTER
DIN
CS
SK
DUMMY
BIT
DOUT
R/W
AMPS
INSTRUCTION
DECODE,
CONTROL,
AND
CLOCK
GENERATION
ADDRESS
REGISTER
ADDRESS
DECODER
EEPROM
ARRAY
256/512x8
128/256x16
WRITE
ENABLE
HIGH VOLTAGE
GENERATOR
Copyright © 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. — www.issi.com
Rev. D
08/15/07
1
