製品説明 仕様・特性: 64Mb Synchronous DRAM based on 1M x 4Bank x16 I/O Document Title 4Bank x 1M x 16bits Synchronous DRAM Revision History Revision No. History Draft Date Remark First Version Release 1.0 1. Changed tOH: 2.0 --> 2.5 [tCK = 7 & 7.5 (CL3) Product] Nov. 2004 1.1 1. Changed Input High/Low Voltage (Page 08) 2. Changed DC characteristics (Page 09) - IDD2NS: 18mA -> 15mA - IDD5:210 / 195 / 180mA -> 170 / 160 / 150mA [Speed 200 / 166 / 143 / 133MHz] 3. Changed Clock High / Low pulse width Time (Page 11) 4. Changed tAC Time (Page11) 5. Changed tRRD Time (Page12) 1.2 1. Corrected Revision No.: 2.0 -> 1.1 2. Deleted Remark at Revision History 3. Corrected AC OPERATING CONDITION - CL 50pF -> 30pF 4. Changed DC OPERATING CONDITION - VIH MAX VDDQ+2.0 -> VDDQ+0.3 and Typ 3.3 -> 3.0 - VIL MIN VSSQ-2.0 -> -0.3 1.3 1. Modified note for Super Low Power in ORDERING INFORMATION Jan. 2005 1.4 1. Corrected PIN ASSIGNMENT A12 to NC Jan. 2005 1.5 1. Corrected comments for overshoot and undershoot Feb. 2005 Dec. 2004 Dec. 2004 This document is a general product description and is subject to change without notice. Hynix does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev. 1.5 / Feb. 2005 1

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HY57V6416201HGT-H	HY57V641620ET7	HY57V641620ET-7DR	HY57V641620ET-H	HY57V641620ETP-7
HY57V641620ETP-H	HY57V641620ETP-H-C	HY57V641620FLTP-6-A	HY57V641620FTP-	HY57V641620FTP-6
HY57V641620FTP-7	HY57V641620FTP-7-A	HY57V641620FTP-7-C	HY57V641620FTP-H	HY57V641620FTP-H-C
HY57V641620HBT-H	HY57V641620HG	HY57V641620HGLT-H	HY57V641620HGLT-HI	HY57V641620HGT
HY57V641620HGT-55	HY57V641620HGT-6	HY57V641620HGT-7	HY57V641620HGT-7I	HY57V641620HGT-H
HY57V641620HGT-P	HY57V641620HGTP-6	HY57V641620HGTP-P

HY57V641620FTP-H-C HYNIX

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