MC74VHC1G125
Noninverting 3−State Buffer
The MC74VHC1G125 is an advanced high speed CMOS
noninverting 3−state buffer fabricated with silicon gate CMOS
technology. It achieves high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining CMOS low power
dissipation.
The internal circuit is composed of three stages, including a buffered
3−state output which provides high noise immunity and stable output.
The MC74VHC1G125 input structure provides protection when
voltages up to 7.0 V are applied, regardless of the supply voltage. This
allows the MC74VHC1G125 to be used to interface 5.0 V circuits to
3.0 V circuits.
http://onsemi.com
MARKING
DIAGRAMS
SC−88A/SOT−353/SC−70
DF SUFFIX
CASE 419A
Features
•
•
•
•
•
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High Speed: tPD = 3.5 ns (Typ) at VCC = 5.0 V
Low Power Dissipation: ICC = 1 mA (Max) at TA = 25°C
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Pin and Function Compatible with Other Standard Logic Families
Chip Complexity: FETs = 58; Equivalent Gates = 15
Pb−Free Packages are Available
W0d
Pin 1
d = Date Code
W0d
TSOP−5/SOT−23/SC−59
DT SUFFIX
CASE 483
Pin 1
d = Date Code
PIN ASSIGNMENT
1
OE
1
OE
2
VCC
5
IN A
3
GND
2
4
3
OUT Y
5
IN A
GND
4
VCC
OUT Y
FUNCTION TABLE
A Input
OE
EN
IN A
Y Output
L
H
X
Figure 1. Pinout (Top View)
OE Input
L
L
H
L
H
Z
ORDERING INFORMATION
OUT Y
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
Figure 2. Logic Symbol
© Semiconductor Components Industries, LLC, 2005
March, 2005 − Rev. 13
1
Publication Order Number:
MC74VHC1G125/D
