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PHD66NQ03LT
PHD66NQ03LT N-channel TrenchMOS logic level FET Rev. 07 — 30 June 2009 Product data sheet 1. Product profile 1.1 General description Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology. This product is designed and qualified for use in computing, communications, consumer and industrial applications only. 1.2 Features and benefits Low conduction losses due to low on-state resistance Suitable for logic level gate drive sources 1.3 Applications DC-to-DC convertors General purpose switching 1.4 Quick reference data Table 1. Quick reference Symbol Parameter Conditions Min Typ Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - - 25 V ID drain current Tmb = 25 °C; VGS = 10 V - - 66 A Ptot total power dissipation Tmb = 25 °C; see Figure 2 - - 93 W VGS = 5 V; ID = 50 A; VDS = 15 V; Tj = 25 °C; see Figure 11 - 3.6 - nC VGS = 10 V; ID = 25 A; Tj = 25 °C; see Figure 9; see Figure 10 - 9.1 10.5 mΩ Dynamic characteristics QGD gate-drain charge Static characteristics RDSon drain-source on-state resistance
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