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MM74C08N
Revised January 2004 MM74C08 Quad 2-Input AND Gate General Description Features The MM74C08 employs complementary MOS (CMOS) transistors to achieve wide power supply operating range, low power consumption and high noise margin, these gates provide basic functions used in the implementation of digital integrated circuit systems. The N- and P-channel enhancement mode transistors provide a symmetrical circuit with output swing essentially equal to the supply voltage. No DC power other than that caused by leakage current is consumed during static condition. All inputs are protected from damage due to static discharge by diode clamps to VCC and GND. s Wide supply voltage range: 3.0V to 15V s Guaranteed noise margin: 1.0V s High noise immunity: 0.45 VCC (typ.) s Low power TTL compatibility: Fan out of 2 driving 74L s Low power consumption: 10 nW/package (typ.) Ordering Code: Order Number MM74CD8N Package Number N14A Package Description 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Connection Diagram Truth Table Inputs Outputs A B L L Y L L H L H L L H H H H = HIGH Level L = LOW Level Top View © 2004 Fairchild Semiconductor Corporation DS005878 www.fairchildsemi.com MM74C08 Quad 2-Input AND Gate October 1987
FAIRCHILD
Fairchild Semiconductor International, Inc
U.S.A
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