MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Dual 2-Wide 2-3-Input
OR-AND/OR-AND Gate
MC10H117
The MC10H117 dual 2–wide 2–3–input OR–AND/OR–AND–Invert gate is a
general purpose logic element designed for use in data control, such as digital
multiplexing or data distribution. Pin 9 is common to both gates. This MECL 10H
part is a functional/pinout duplication of the standard MECL 10K family part,
with 100% improvement in propagation delay, and no increase in power–supply
current.
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
• Propagation Delay, 1.0 ns Typical
• Power Dissipation 100 mW/Gate Typical (same as MECL 10K)
• Improved Noise Margin 150 mV (Over Operating Voltage and
Temperature Range)
• Voltage Compensated
• MECL 10K–Compatible
FN SUFFIX
PLCC
CASE 775–02
LOGIC DIAGRAM
MAXIMUM RATINGS
Characteristic
Symbol
Rating
Unit
4
VEE
VI
–8.0 to 0
Vdc
5
0 to VEE
Vdc
Power Supply (VCC = 0)
Input Voltage (VCC = 0)
Output Current — Continuous
— Surge
Iout
50
100
mA
Operating Temperature Range
TA
Tstg
0 to +75
°C
–55 to +150
–55 to +165
3
°C
°C
Storage Temperature Range — Plastic
— Ceramic
7
9
10
ELECTRICAL CHARACTERISTICS (VEE = –5.2 V ±5%) (See Note)
0°
25°
11
15
Symbol
Min
Max
Min
Max
Min
Max
Power Supply Current
IE
—
29
—
26
—
29
12
Unit
mA
IinL
VOH
High Output Voltage
Low Output Voltage
13
µA
IinH
Input Current Low
14
75°
Characteristic
Input Current High
Pins 4, 5, 12, 13
Pins 6, 7, 10, 11
Pin 9
2
6
VCC1 = PIN 1
VCC2 = PIN 16
VEE = PIN 8
DIP
PIN ASSIGNMENT
—
—
—
465
545
710
—
—
—
275
320
415
—
—
—
275
320
415
0.5
—
0.5
—
0.3
—
µA
–0.735
Vdc
–1.02 –0.84 –0.98 –0.81 –0.92
VOL
VIH
–1.95 –1.63 –1.95 –1.63 –1.95
–1.60
Vdc
High Input Voltage
–1.17 –0.84 –1.13 –0.81 –1.07
–0.735
Vdc
Low Input Voltage
VIL
–1.95 –1.48 –1.95 –1.48 –1.95
–1.45
Vdc
VCC1
16
VCC2
AOUT
2
15
BOUT
AOUT
AC PARAMETERS
1
3
14
BOUT
0.45
1.35
0.45
1.35
0.5
1.5
ns
A1IN
4
13
B1IN
Rise Time
tpd
tr
0.5
1.5
0.5
1.6
0.5
1.7
ns
A1IN
5
12
B1IN
Fall Time
tf
0.5
1.5
0.5
1.6
0.5
1.7
ns
A2IN
6
11
B2IN
A2IN
7
10
B2IN
VEE
8
9
A2IN, B2IN
Propagation Delay
NOTE:
Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table,
after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit
board and transverse air flow greater than 500 Iinear fpm is maintained. Outputs are terminated through
a 50–ohm resistor to –2.0 volts.
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).
3/93
© Motorola, Inc. 1996
2–223
REV 5