MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Dual D Type Master-Slave
Flip-Flop
MC10H131
The MC10H131 is a MECL 10H part which is a functional/pinout duplication
of the standard MECL 10K family part, with 100% improvement in clock speed
and propagation delay and no increase in power–supply current.
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
• Propagation Delay, 1.0 ns Typical
• Power Dissipation, 235 mW Typical
• Improved Noise Margin 150 mV (Over Operating Voltage and
Temperature Range)
• Voltage Compensated
• MECL 10K–Compatible
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
FN SUFFIX
PLCC
CASE 775–02
MAXIMUM RATINGS
Symbol
Rating
Unit
Power Supply (VCC = 0)
Characteristic
VEE
–8.0 to 0
Vdc
Input Voltage (VCC = 0)
VI
0 to VEE
Vdc
Output Current — Continuous
— Surge
Iout
50
100
mA
Operating Temperature Range
TA
0 to +75
°C
Tstg
–55 to +150
–55 to +165
°C
°C
Storage Temperature Range — Plastic
— Ceramic
LOGIC DIAGRAM
S1 5
Characteristic
Power Supply Current
25°
Min
Max
Min
Max
Min
Max
Unit
IE
—
62
—
56
—
62
Input Current Low
High Output Voltage
Q2
µA
IinH
530
660
485
790
—
—
—
—
310
390
285
465
—
—
—
—
310
390
285
465
IinL
0.5
—
0.5
—
0.3
—
µA
RS TRUTH TABLE
VOH
–1.02
–0.84
–0.98
–0.81
–0.92
–0.735
Vdc
R
VOL
–1.95
–1.63
–1.95
–1.63
–1.95
–1.60
–1.17
–0.84
–1.13
–0.81
–1.07
–0.735
Low Input Voltage
VIL
–1.95
–1.48
–1.95
–1.48
–1.95
–1.45
AC PARAMETERS
H
H
H
L
L
H
Vdc
L
Qn+1
Qn
L
Vdc
S
CLOCKED TRUTH TABLE
L
Vdc
VIH
H
N.D.
N.D. = Not Defined
1.6
1.6
0.8
0.7
1.7
1.7
0.8
0.7
1.8
1.8
Rise Time
tr
0.6
2.0
0.6
2.0
0.6
2.2
tf
0.6
2.0
0.6
2.0
0.6
2.2
ns
tset
0.7
—
0.7
—
0.7
—
D
L
X
ns
H
L
L
H
H
H
C = CE + CC
thold
0.8
—
0.8
—
0.8
—
ftog
250
—
250
—
250
—
15
VCC2
Q2
3
14
Q2
R1
4
13
R2
S1
5
12
S2
CE1
NOTE:
Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table,
after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit
board and transverse air flow greater than 500 Iinear fpm is maintained. Outputs are terminated through
a 50–ohm resistor to –2.0 volts.
2
Q1
MHz
16
Q1
ns
Toggle Frequency
1
6
11
CE2
D1
Hold Time
VCC1
7
10
D2
VEE
Set–up Time
Qn+1
Qn
DIP
PIN ASSIGNMENT
ns
Fall Time
C
A clock H is a clock transition
from a low to a high state.
ns
0.8
0.6
15
S2 12
High Input Voltage
tpd
14
Q2
CE2 11
D2 10
—
—
—
—
Low Output Voltage
Propagation Delay
Clock, CE
Set, Reset
VCC1 = PIN 1
VCC2 = PIN 16
VEE = PIN 8
mA
Input Current High
Pins 6, 11
Pin 9
Pins 7, 10
Pins 4, 5, 12, 13
3
R1 4
CC 9
R2 13
75°
Symbol
2
Q1
ELECTRICAL CHARACTERISTICS (VEE = –5.2 V ±5%) (See Note)
0°
Q1
D1 7
CE1 6
8
9
CC
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).
3/93
© Motorola, Inc. 1996
2–69
REV 5