SD-14595/96/97
SYNCHRO/RESOLVER-TO-DIGITAL
CONVERTERS
DESCRIPTION
FEATURES
14595/96/97 accomplishes synchronization to a computer with the
Converter Busy (CB) output and/or the
Inhibit (INH) input.
The SD-14595 is a low-cost, high
reliability, synchro- or resolver-to-digital converter with 14-bit-only, 16-bitonly or pin programmable 14-bit or
16-bit resolution. Packaged in a 36pin DDIP, the SD-14595/96/97 series
feature Built-In-Test (BIT) output.
SOLID STATE RESOLVER INPUT OPTION
S1
S2
S3
S4
SIN θ
COS θ
S3
14 Bit Only or 16 Bit Only
• No 180° False Lock-up
• Internal Synthesized Reference
• Built-In-Test (BIT) Output
Designed with three-state output, the
SD-14595/96/97 is especially wellsuited for use with computer based
systems. Among the many possible
applications are radar and navigation
systems, fire control systems, flight
instrumentation, and flight trainers or
simulators.
SOLID STATE SYNCHRO INPUT OPTION
ELECTRONIC
SCOTT T
• Pin Programmable 14 Bit/16 Bit,
Because of its high reliability, small
size, and low power consumption, the
SD-14595/96/97 is ideal for military
ground or avionics applications. All
models are available with MIL-PRF38534 processing.
The digital angle output from the
SD-14595/96/97 is a natural binary
code, parallel positive logic and is
TTL/CMOS compatible. The SD-
S2
• Accuracy to 1.3 Arc Minutes
APPLICATIONS
The SD-14595/96/97 series accepts
broadband inputs: 360 to 1 kHz. Other
features are solid-state signal and reference isolation and high common
mode rejection. In addition, the SD14596 and SD-14597 are pin-for-pin
replacements for the Natel 1044 and
1046, respectively.
S1
• Single +5 V Power Supply
• Pin-for-Pin Replacement for
Natel’s 1044 and 1046
DIRECT INPUT OPTION
SIN θ
SIN θ
COS θ
RESOLVER
CONDITIONER
• Low Power
COS θ
VOLTAGE
FOLLOWER
BUFFER
V
INPUT OPTIONS
SIN θ
COS θ
INTERNAL
DC
REFERENCE
REF IN
RH
RL
BIT
REFERENCE
CONDITIONER
e
LOS
R
SYNTHESIZED
REF
BIT DETECT
VEL
LOS
SIN θ
INPUT OPTION
HIGH
ACCURACY
CONTROL
TRANSFORMER
COS θ
GAIN
e
DEMODULATOR
SIN
(θ-φ)
D
VEL
ERROR
PROCESSOR
VCO
T
E
U
1 LSB ANTIJITTER FEEDBACK
16 BIT CT
TRANSPARENT
LATCH
CB
U
16 BIT
UP/DOWN
COUNTER
T
DIGITAL
ANGLE φ
50 ns DELAY
INH
3 STATE
TTL BUFFER
16 BIT OUTPUT
TRANSPARENT
LATCH
Q
T
3 STATE
TTL BUFFER
BITS 1-8
BITS 9-16 LBE
ANALOG RETURN
V(+4.3 V)
14B
RESOLUTION (14595 ONLY)
CONTROL
FIGURE 1. SD-14595/96/97 BLOCK DIAGRAM
© 1997, 1999 Data Device Corporation
INH
VOLTAGE
DOUBLER
+5 V
+8.6 V
EDGE
TRIGGERED
LATCH
V
HBE
INHIBIT
TRANSPARENT
LATCH
