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SY100H601
DESCRIPTION
FEATURES
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SY10H601
SY100H601
SY10H601
9-BIT ECL-TO-TTL
WITH 3-STATE ENABLE
Micrel, Inc.
9-bit ideal for byte-parity applications
3-state TTL outputs
Flow-through configuration
Extra TTL and ECL power/ground pins to minimize
switching noise
ECL and TTL 3-state control inputs
4.8ns max. delay into 50pF, 9.6ns into 200pF (all
outputs switching)
PNP TTL inputs for low loading
Choice of ECL compatibility: MECL 10KH (10Hxxx)
or 100K (100Hxxx)
Fully compatible with MC10H/100H601
Available in 28-pin PLCC package
The SY10/100H601 are 9-bit, dual supply ECL-to-TTL
translators. Devices in the Micrel 9-bit translator series
utilize the 28-lead PLCC for optimal power pinning, signal
flow-through and electrical performance.
The devices feature a 48mA TTL output stage and AC
performance is specified into both a 50pF and 200pF
load capacitance. For the 3-state output disable, both
ECL and TTL control inputs are provided, allowing
maximum design flexibility.
The 10H version is compatible with MECL 10KH ECL
logic levels. The 100H version is compatible with 100K
levels.
PIN NAMES
BLOCK DIAGRAM
Pin
OEECL
Function
GND
VCCT
D3
D4
Q4
Q6
D7
Q7
D8
3-State Control (TTL)
Q5
D6
3-State Control (ECL)
Q3
D5
ECL
Q2
Data Outputs (TTL)
OETTL
D2
Data Inputs (ECL)
OEECL
Q1
ECL Supply (–5.2/–4.5V)
Q0–Q8
D1
TTL Supply (+5.0V)
D0–D8
Q0
ECL VCC (0V)
VEE
D0
TTL Ground (0V)
VCCE
OETTL
Q8
M9999-032906
hbwhelp@micrel.com or (408) 955-1690
TTL
Rev.: E
1
Amendment: /0
Issue Date: March 2006
