Si 5 50
REVISION D
VO L TAG E - C ONTR OLLED C RYSTAL O S C I L L A T O R (VCXO)
10 MH Z TO 1.4 G H Z
Features
Available with any frequency from
10 to 945 MHz and select
frequencies to 1.4 GHz
3rd generation DSPLL® with
superior jitter performance (0.5 ps)
3x better temperature stability than
SAW-based oscillators
Excellent PSRR performance
Internal fixed crystal frequency
ensures high reliability and low
aging
Available CMOS, LVPECL,
LVDS, and CML outputs
3.3, 2.5, and 1.8 V supply options
Industry-standard 5 x 7 mm
package and pinout
Pb-free/RoHS-compliant
Si5602
Ordering Information:
Applications
See page 9.
SONET/SDH
xDSL
10 GbE LAN/WAN
Low-jitter clock generation
Optical modules
Clock and data recovery
Pin Assignments:
See page 8.
Description
The Si550 VCXO utilizes Silicon Laboratories’ advanced DSPLL® circuitry to
provide a low-jitter clock at high frequencies. The Si550 supports any
frequency from 10 to 945 MHz and select frequencies to 1417 MHz. Unlike
traditional VCXOs, where a different crystal is required for each output
frequency, the Si550 uses one fixed crystal to provide a wide range of output
frequencies. This IC-based approach allows the crystal resonator to provide
exceptional frequency stability and reliability. In addition, DSPLL clock
synthesis provides superior supply noise rejection, simplifying the task of
generating low-jitter clocks in noisy environments typically found in
communication systems. The Si550 IC-based VCXO is factory-configurable
for a wide variety of user specifications, including frequency, supply voltage,
output format, tuning slope, and temperature stability. Specific configurations
are factory programmed at time of shipment, thereby eliminating the long
lead times associated with custom oscillators.
(Top View)
VC
1
6
VDD
OE
2
5
CLK–
GND
3
4
CLK+
Functional Block Diagram
V DD
Any-Frequency
10 MHz–1.4 GHz
DSPLL ®
Clock Synthesis
Fixed
Frequency
XO
Vc
CLK–
ADC
OE
Rev. 1.0 1/12
CLK+
GND
Copyright © 2012 by Silicon Laboratories
Si550
