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MC10109LP
MOTOROLA SEMICONDUCTOR TECHNICAL DATA Dual 4-5-Input OR/NOR Gate MC10109 The MC10109 is a dual 4–5 input OR/NOR gate. PD = 30 mW typ/gate (No Load) tpd = 2.0 ns typ tr, tf = 2.0 ns typ (20%–80%) L SUFFIX CERAMIC PACKAGE CASE 620–10 LOGIC DIAGRAM 4 5 P SUFFIX PLASTIC PACKAGE CASE 648–08 FN SUFFIX PLCC CASE 775–02 3 6 7 9 10 11 12 13 2 14 DIP PIN ASSIGNMENT 15 VCC1 16 VCC2 AOUT 2 15 BOUT AOUT 3 14 BOUT AIN 4 13 BIN AIN 5 12 BIN AIN 6 11 BIN AIN 7 10 BIN VEE VCC1 = PIN 1 VCC2 = PIN 16 VEE = PIN 8 1 8 9 BIN Pin assignment is for Dual–in–Line Package. For PLCC pin assignment, see the Pin Conversion Tables on page 6–11 of the Motorola MECL Data Book (DL122/D). 3/93 © Motorola, Inc. 1996 3–35 REV 5
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