4Mb: 256K x 18, 128K x 32/36
3.3V I/O PIPELINED, DCD SYNCBURST SRAM
4Mb SYNCBURST™
SRAM
MT58L256L18D1, MT58L128L32D1,
MT58L128L36D1
3.3V VDD, 3.3V I/O, Pipelined, DoubleCycle Deselect
FEATURES
100-Pin TQFP1
• Fast clock and OE# access times
• Single +3.3V +0.3V/-0.165V power supply (VDD)
• Separate +3.3V isolated output buffer supply
(VDDQ)
• SNOOZE MODE for reduced-power standby
• Common data inputs and data outputs
• Individual BYTE WRITE control and GLOBAL
WRITE
• Three chip enables for simple depth expansion and
address pipelining
• Clock-controlled and registered addresses, data
I/Os and control signals
• Internally self-timed WRITE cycle
• Burst control pin (interleaved or linear burst)
• Automatic power-down for portable applications
• 165-pin FBGA package
• 100-pin TQFP package
• 119-pin BGA package
• Low capacitive bus loading
• x18, x32, and x36 versions available
OPTIONS
165-Pin FBGA
(Preliminary Package Data)
MARKING
• Timing (Access/Cycle/MHz)
3.5ns/6ns/166 MHz
4.0ns/7.5ns/133 MHz
5ns/10ns/100 MHz
• Configurations
256K x 18
128K x 32
128K x 36
-6
-7.5
-10
MT58L256L18D1
MT58L128L32D1
MT58L128L36D1
• Packages
100-pin TQFP
165-pin FBGA
119-pin, 14mm x 22mm BGA
T
F*
B
• Operating Temperature Range
Commercial (0°C to +70°C)
Industrial (-40°C to +85°C)**
119-Pin BGA2
None
IT
Part Number Example:
MT58L256L18D1T-6
* A Part Marking Guide for the FBGA devices can be found on Micron’s
Web site—http://www.micron.com/support/index.html.
** Industrial temperature range offered in specific speed grades and
configurations. Contact factory for more information.
4Mb: 256K x 18, 128K x 32/36 3.3V I/O Pipelined, DCD SyncBurst SRAM
MT58L256L18D1_D.p65 – Rev. 10/01
NOTE: 1. JEDEC-standard MS-026 BHA (LQFP).
2. JEDEC-standard MS-028 BHA (PBGA).
1
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2001, Micron Technology, Inc.
