REI Datasheet
SN5496, SN7496, SN54LS96, SN74LS96
5-Bit Shift Registers
These shift registers consist of five R-S master-slave flip-flops connected to perform parallel-to-serial
or serial-to-parallel conversion of binary data. Since both inputs and outputs for all flip-flops are
accessible, parallel-in/parallel-out or serial-in/serial-out operation may be performed.
All flip-flops are simultaneously set to a low output level by applying a low-level voltage to the clear
input while the preset is inactive (low). Clearing is independent of the level of the clock input. The
register may be parallel loaded by using the clear input in conjunction with the preset inputs. After
clearing all stages to low output levels, data to be loaded is applied to the individual preset inputs
(A, B, C, D, and E) and a high-level load pulse is applied to the preset enable input. Presetting like
clearing is independent of the level of the clock input.
Rochester Electronics
Manufactured Components
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or Rochester wafers recreated from the
original IP. All recreations are done with
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Parts are tested using original factory
test programs or Rochester developed
test solutions to guarantee product
meets or exceeds the OCM data sheet.
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The original manufacturer’s datasheet accompanying this document reflects the performance
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‘Typical’ values are for reference purposes only. Certain minimum or maximum ratings may be
based on product characterization, design, simulation, or sample testing.
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