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4778

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SN74AUC2G66 DUAL BILATERAL ANALOG SWITCH www.ti.com SCES507 – NOVEMBER 2003 – REVISED DECEMBER 2005 FEATURES • • • • • • • • • DCT OR DCU PACKAGE (TOP VIEW) Available in the Texas Instruments NanoStar™ and NanoFree™ Packages Operates at 0.8 V to 2.7 V Sub-1-V Operable Max tpd of 0.5 ns at 1.8 V Low Power Consumption, 10 µA at 2.7 V High On-Off Output Voltage Ratio High Degree of Linearity Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Performance Tested Per JESD 22 – 2000-V Human-Body Model (A114-B, Class II) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) 1A 1B 2C GND 1 8 2 7 3 6 4 5 VCC 1C 2B 2A YEP OR YZP PACKAGE (BOTTOM VIEW) GND 2C 1B 1A 4 5 3 6 2 7 1 8 2A 2B 1C VCC DESCRIPTION/ORDERING INFORMATION This dual analog switch is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.1-V to 2.7-V VCC operation. The SN74AUC2G66 can handle both analog and digital signals. It permits signals with amplitudes of up to 2.7-V (peak) to be transmitted in either direction. NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems. ORDERING INFORMATION PACKAGE (1) TA ORDERABLE PART NUMBER TOP-SIDE MARKING (2) NanoStar™ – WCSP (DSBGA) 0.23-mm Large Bump – YEP (2) NanoFree™ – WCSP (DSBGA) 0.23-mm Large Bump – YZP (Pb-free) Tape and reel SN74AUC2G66YZPR Tape and reel SN74AUC2G66DCTR U66_ _ _ VSSOP – DCU (1) SN74AUC2G66YEPR SSOP – DCT –40°C to 85°C Tape and reel Tape and reel SN74AUC2G66DCUR U66_ _ _ _U6_ Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site. DCU: The actual top-side marking has one additional character that designates the assembly/test site. YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free). FUNCTION TABLE CONTROL INPUT (C) SWITCH L OFF H ON Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. NanoStar, NanoFree are trademarks of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2003–2005, Texas Instruments Incorporated

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