Philips Semiconductors Advanced BiCMOS Products
Product specification
Dual 9-bit D-type flip-flop with
reset and enable (3-State)
FEATURES
MB2823
provide extra data width for wider
data/address paths of buses carrying parity.
• Output capability: +64mA/–32mA
• Two sets of high speed parallel registers
with positive edge-triggered D-type
flip-flops
• Latch-up protection exceeds 500mA per
Jedec JC40.2 Std 17
The MB2823 has two 9-bit wide buffered
registers with Clock Enable (nCE) and
Master Reset (nMR) which are ideal for parity
bus interfacing in high microprogrammed
systems.
• ESD protection exceeds 2000 V per MIL
STD 883 Method 3015 and 200 V per
Machine Model
• Ideal where high speed, light loading, or
increased fan–in are required with MOS
microprocessors
• Live insertation/extraction permitted
The registers are fully edge-triggered. The
state of each D input, one set–up time before
the Low-to-High clock transition is transferred
to the corresponding flip–flop’s Q output.
DESCRIPTION
• Power-up 3-State
The MB2823 dual bus interface register is
designed to eliminate the extra packages
required to buffer existing registers and
• Power-up Reset
QUICK REFERENCE DATA
SYMBOL
CONDITIONS
Tamb = 25°C; GND = 0V
PARAMETER
TYPICAL
UNIT
4.6
ns
tPLH
tPHL
Propagation delay
nCP to nQx
CL = 50pF; VCC = 5V
CIN
Input capacitance
VI = 0V or VCC
4
pF
COUT
Output capacitance
VO = 0V or VCC; 3-state
7
pF
ICCZ
Total supply current
Outputs disabled; VCC = 5.5V
500
nA
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
ORDER CODE
DRAWING NUMBER
52-Pin Plastic Quad Flat Pack
–40°C to +85°C
MB2823BB
1418B
52 51
50 49 48 47
46 45 44 43 42
42
41
39
38
37
36
35
34
Vcc
1D2
44
1D1
GND
1D0
1CE
1CP
LOGIC SYMBOL
1MR
1OE
1Q0
1Q1
1Q2
Vcc
PIN CONFIGURATION
41 40
1D0 1D1 1D2 1D3 1D4 1D5 1D6 1D7 1D8
1Q3
1
1Q4
2
3
GND
4
5
1Q7
6
1Q8
7
2Q0
8
2Q1
9
1MR
36 1D6
1Q6
1CE
47
37 1D5
1CP
45
38 1D4
1Q5
46
39 1D3
È
È
È
48
1OE
1Q0 1Q1 1Q2 1Q3 1Q4 1Q5 1Q6 1Q7 1Q8
35 1D7
MB2823
52-Pin
Quad Flat Pack
34 1D8
49
50
51
1
2
3
5
6
7
33 2D0
33
32
31
29
28
27
25
24
23
32 2D1
31 2D2
2D0 2D1 2D2 2D3 2D4 2D5 2D6 2D7 2D8
21
2CP
2Q3 11
29 2D3
22
2CE
2Q4 12
28 2D4
20
2MR
2Q5 13
27 2D5
19
2OE
2Q0 2Q1 2Q2 2Q3 2Q4 2Q5 2Q6 2Q7 2Q8
2D6
2D7
26
2CE
21 22 23 24 25
2CP
2MR
2OE
2Q8
17 18 19 20
GND
2Q7
Vcc
August 24, 1993
2Q6
14 15 16
Vcc
30 GND
2D8
2Q2 10
8
2
9
10
11
12
13
15
16
18
853–1705 10616
