MOTOROLA
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by MCM6729D/D
SEMICONDUCTOR TECHNICAL DATA
256K x 4 Bit Fast Static Random
Access Memory
MCM6729D
The MCM6729D is a 1,048,576 bit static random access memory organized
as 262,144 words of 4 bits. Static design eliminates the need for external clocks
or timing strobes.
Output enable (G) is a special control feature that provides increased system
flexibility and eliminates bus contention problems.
This device meets JEDEC standards for functionality and revolutionary pinout,
and is available in a 400 mil plastic small–outline J–leaded package.
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•
•
•
•
•
Single 5 V ± 10% Power Supply
Fully Static — No Clock or Timing Strobes Necessary
All Inputs and Outputs Are TTL Compatible
Three State Outputs
Fast Access Times: 8, 10, 12 ns
Center Power and I/O Pins for Reduced Noise
WJ PACKAGE
400 MIL SOJ
CASE 857A–02
PIN ASSIGNMENT
NC
A
DQ
E
A
A
A
A
A
A
A
6
27
G
7
26
DQ
8
25
VSS
9
24
VCC
10
23
DQ
11
22
A
12
21
A
A
COLUMN I/O
COLUMN DECODER
A
13
20
A
14
19
A
15
18
A
NC
INPUT
DATA
CONTROL
28
A
DQ
5
A
A
A
DQ
A
29
VSS
A
4
A
A
A
W
ROW
DECODER
30
VCC
MEMORY
MATRIX
512 ROWS x 512 x 4
COLUMNS
3
DQ
A
A
E
A
31
A
A
2
A
VCC
VSS
A
A
A
32
A
BLOCK DIAGRAM
1
16
17
NC
PIN NAMES
A
A
A . . . . . . . . . . . . . . . . . . . . . Address Input
E . . . . . . . . . . . . . . . . . . . . . . Chip Enable
W . . . . . . . . . . . . . . . . . . . . Write Enable
G . . . . . . . . . . . . . . . . . . . Output Enable
DQ . . . . . . . . . . . . . . . Data Input/Output
VCC . . . . . . . . . . . . + 5 V Power Supply
VSS . . . . . . . . . . . . . . . . . . . . . . . Ground
NC . . . . . . . . . . . . . . . . . . No Connection
W
G
10/9/96
© Motorola, Inc. 1996
MOTOROLA FAST SRAM
MCM6729D
1
