TC55VBM416AFTN55
TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
1,048,576-WORD BY 16-BIT/2,097,152-WORD BY 8-BIT FULL CMOS STATIC RAM
DESCRIPTION
The TC55VBM416AFTN is a 16,777,216-bit static random access memory (SRAM) organized as 1,048,576 words
by 16 bits/2,097,152 words by 8 bits. Fabricated using Toshiba's CMOS Silicon gate process technology, this device
operates from a single 2.3 to 3.6 V power supply. Advanced circuit technology provides both high speed and low
power at an operating current of 3 mA/MHz and a minimum cycle time of 55 ns. It is automatically placed in
low-power mode at 0.9 µA standby current (at VDD = 3 V, Ta = 25°C, typical) when chip enable ( CE1 ) is asserted
high or (CE2) is asserted low. There are three control inputs. CE1 and CE2 are used to select the device and for
data retention control, and output enable ( OE ) provides fast memory access. Data byte control pin ( LB , UB )
provides lower and upper byte access. This device is well suited to various microprocessor system applications
where high speed, low power and battery backup are required. And, with a guaranteed operating extreme
temperature range of −40° to 85°C, the TC55VBM416AFTN can be used in environments exhibiting extreme
temperature conditions. The TC55VBM416AFTN is available in a plastic 48-pin thin-small-outline package
(TSOP).
FEATURES
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Low-power dissipation
Operating: 9 mW/MHz (typical)
Single power supply voltage of 2.3 to 3.6 V
Power down features using CE1 and CE2
Data retention supply voltage of 1.5 to 3.6 V
Direct TTL compatibility for all inputs and outputs
Wide operating temperature range of −40° to 85°C
Standby Current (maximum):
3.6 V
Access Time
55 ns
CE2
Access Time
55 ns
OE
•
55 ns
CE1 Access Time
15 µA
3.0 V
Access Times (maximum):
Access Time
30 ns
Package:
TSOPⅠ48-P-1220-0.50
8 µA
PIN ASSIGNMENT (TOP VIEW)
(Weight:0.51 g typ)
PIN NAMES
48 PIN TSOP
A0~A19
48
Address Inputs (Word Mode)
A-1~A19
Address Inputs (Byte Mode)
CE1 , CE2
1
Chip Enable
R/W
Read/Write Control
OE
Output Enable
LB , UB
24
I/O1~I/O16
25
BYTE
(Normal)
Data Byte Control
Data Inputs/Outputs
Word/Byte Mode Select
VDD
Power
GND
Ground
NC
No Connection
OP*
Option
*: OP pin must be open or connected to GND.
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Pin Name
A15
A14
A13
A12
A11
A10
A9
A8
A19
NC
R/W
CE2
OP
UB
LB
A18
Pin No.
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Pin Name
A17
A7
A6
A5
A4
A3
A2
A1
A0
CE1
GND
OE
I/O1
I/O9
I/O2
I/O10
Pin No.
33
34
35
36
37
38
39
40
41
42
43
44
Pin Name
I/O3
I/O11
I/O4
I/O12
VDD
I/O5
I/O13
I/O6
I/O14
I/O7
I/O15
I/O8
45
46
47
I/O16 GND BYTE
/A-1
2003-12-25
48
A16
1/14