TC74HC4020,4040AP/AF/AFN
TOSHIBA CMOS Digital Integrated Circuit
Silicon Monolithic
TC74HC4020AP,TC74HC4020AF,TC74HC4020AFN
TC74HC4040AP,TC74HC4040AF,TC74HC4040AFN
TC74HC4020AP/AF/AFN
TC74HC4040AP/AF/AFN
14-Stage Binary Counter
12-Stage Binary
Counter
Note: xxxFN (JEDEC SOP) is not available in
Japan.
TC74HC4020AP, TC74HC4040AP
The TC74HC4020A/TC74HC4040A are high speed CMOS
BINARY COUNTER/DIVIDERs fabricated with silicon gate
C2MOS technology.
They achieve the high speed operetion similar to equivalent
LSTTL while maintaining the CMOS dissipation.
The TC74HC4020A is a 14-STAGE BINARY COUNTER, and
the TC74HC4040A is a 12-STAGE BINARY COUNTER.
Setting CLR to high resets the counter to low.
A negative transition on the CK input brings one increment
into the counter.
The TC74HC4020A provides 12 divided outputs: 1’st stage and
stage 4 thru stage 14. At Q14, a 1/16384 divided frequency will
be output.
The TC74HC4040A provides all divided output stages, and at
Q12, a 1/4096 divided frequency will be output.
All inputs are equipped with protection circuits against static
discharge or transient excess voltage.
TC74HC4020AF, TC74HC4040AF
TC74HC4020AFN, TC74HC4040AFN
Features
•
High speed: fmax = 73 MHz (typ.) at VCC = 5 V
•
Low power dissipation: ICC = 4 μA (max) at Ta = 25°C
•
High noise immunity: VNIH = VNIL = 28% VCC (min)
•
Output drive capability: 10 LSTTL loads
•
•
Symmetrical output impedance: |IOH| = IOL = 4 mA (min)
Balanced propagation delays: tpLH ∼ tpHL
−
•
Wide operating voltage range: VCC (opr) = 2~6 V
•
Pin and function compatible with 4020B/4040B
1
Weight
DIP16-P-300-2.54A
SOP16-P-300-1.27A
SOL16-P-150-1.27
: 1.00 g (typ.)
: 0.18 g (typ.)
: 0.13 g (typ.)
2007-10-01
TC74HC4020,4040AP/AF/AFN
System Diagram
TC74HC4020A
TC74HC4040A
3
2007-10-01