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HCPL-0631-000E

製品説明
仕様・特性

High CMR, High Speed TTL Compatible Optocouplers 6N137 HCNW137 HCNW2601 HCNW2611 HCPL-0600 HCPL-0601 HCPL-0611 HCPL-0630 Technical Data Features • 5 kV/µs Minimum Common Mode Rejection (CMR) at VCM = 50 V for HCPL-X601/ X631, HCNW2601 and 10 kV/µs Minimum CMR at VCM = 1000 V for HCPLX611/X661, HCNW2611 • High Speed: 10 MBd Typical • LSTTL/TTL Compatible • Low Input Current Capability: 5 mA • Guaranteed ac and dc Performance over Temperature: -40°C to +85°C • Available in 8-Pin DIP, SOIC-8, Widebody Packages • Strobable Output (Single Channel Products Only) • Safety Approval UL Recognized - 3750 V rms for 1 minute and 5000 V rms* for 1 minute per UL1577 CSA Approved IEC/EN/DIN EN 60747-5-2 Approved with VIORM = 630 V peak for HCPL-2611 Option 060 and VIORM = 1414 V peak for HCNW137/26X1 • MIL-PRF-38534 Hermetic Version Available (HCPL56XX/66XX) Applications • Isolated Line Receiver • Computer-Peripheral Interfaces • Microprocessor System Interfaces • Digital Isolation for A/D, D/A Conversion • Switching Power Supply • Instrument Input/Output Isolation • Ground Loop Elimination • Pulse Transformer Replacement HCPL-0631 HCPL-0661 HCPL-2601 HCPL-2611 HCPL-2630 HCPL-2631 HCPL-4661 • Power Transistor Isolation in Motor Drives • Isolation of High Speed Logic Systems Description The 6N137, HCPL-26XX/06XX/ 4661, HCNW137/26X1 are optically coupled gates that combine a GaAsP light emitting diode and an integrated high gain photo detector. An enable input allows the detector to be strobed. The output of the detector IC is Functional Diagram 6N137, HCPL-2601/2611 HCPL-0600/0601/0611 HCPL-2630/2631/4661 HCPL-0630/0631/0661 ANODE 1 1 8 VCC VE CATHODE 1 2 7 VO1 6 VO CATHODE 2 3 6 VO2 5 GND ANODE 2 4 5 GND NC 1 8 VCC ANODE 2 7 CATHODE 3 NC 4 SHIELD TRUTH TABLE (POSITIVE LOGIC) LED ON OFF ON OFF ON OFF ENABLE H H L L NC NC OUTPUT L H H H L H SHIELD TRUTH TABLE (POSITIVE LOGIC) LED ON OFF OUTPUT L H *5000 V rms/1 Minute rating is for HCNW137/26X1 and Option 020 (6N137, HCPL-2601/11/30/31, HCPL-4661) products only. A 0.1 µF bypass capacitor must be connected between pins 5 and 8. CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD.

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