ICS551
1 TO 4 CLOCK BUFFER
Description
Features
The ICS551 is a low cost, high-speed single input to
four output clock buffer. Part of ICS’ ClockBlocksTM
family, this is our lowest cost, small clock buffer.
•
•
•
•
•
•
•
•
•
•
•
See the ICS552-02B for monolithic dual version of the
ICS551 in a 20 pin QSOP.
ICS makes many non-PLL and PLL based low skew
output devices as well as Zero Delay Buffers to
synchronize clocks. Contact ICS for all of your clocking
needs.
Low skew (250 ps) outputs
Pb-free packaging available
Low cost clock buffer
Packaged in 8-pin SOIC
Input/Output clock frequency up to 160 MHz
Non-inverting output clock
Ideal for networking clocks
Operating Voltages of 3.3 and 5.0 V
Output Enable mode tri-states outputs
Advanced, low power CMOS process
Commercial and industrial temperature versions
Block Diagram
Q1
Q2
ICLK
Q3
Q4
Output Enable
1
MDS 551 L
I n t e gra te d C i r c u i t S y s t e m s
●
525 Race Stre et, San Jo se, CA 9 5126
Revision 042606
●
te l (40 8) 2 97-12 01
●
w w w. i c st . c o m
