HI-200, HI-201
®
Data Sheet
April 6, 2005
FN3121.8
Dual/Quad SPST, CMOS Analog Switches
Features
HI-200/HI-201 (dual/quad) are monolithic devices comprising
independently selectable SPST switches which feature fast
switching speeds (HI-200 240ns, and HI-201 185ns)
combined with low power dissipation (15mW at 25oC). Each
switch provides low “ON” resistance operation for input signal
voltage up to the supply rails and for signal current up to
80mA. Rugged DI construction eliminates latch-up and
substrate SCR failure modes.
• Pb-Free Available (RoHS Compliant)
• Analog Voltage Range . . . . . . . . . . . . . . . . . . . . . . . ±15V
• Analog Current Range . . . . . . . . . . . . . . . . . . . . . . . 80mA
• Turn-On Time. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 240ns
• Low rON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55Ω
• Low Power Dissipation. . . . . . . . . . . . . . . . . . . . . . .15mW
All devices provide break-before-make switching and are
TTL and CMOS compatible for maximum application
versatility. HI-200/HI-201 are ideal components for use in
high frequency analog switching. Typical applications
include signal path switching, sample and hold circuit, digital
filters, and operational amplifier gain switching networks.
• TTL/CMOS Compatible
Ordering Information
• Digital Filters
PART NUMBER
HI3-0200-5Z
(Note)
TEMP.
RANGE (°C)
0 to 75
PACKAGE
PKG.
DWG. #
14 Ld PDIP*
(Pb-free)
E14.3
Applications
• High Frequency Analog Switching
• Sample and Hold Circuits
• Operational Amplifier Gain Switching Networks
Functional Diagram
V+
HI1-0201-2
-55 to 125
16 Ld CERDIP
F16.3
HI1-0201-4
-25 to 85
16 Ld CERDIP
F16.3
HI1-0201-5
0 to 75
16 Ld CERDIP
F16.3
HI3-0201-5
0 to 75
16 Ld PDIP
E16.3
HI3-0201-5Z
(Note)
0 to 75
16 Ld PDIP*
(Pb-free)
E16.3
HI4P0201-5
0 to 75
20 Ld PLCC
N20.35
HI4P0201-5Z
(Note)
0 to 75
20 Ld PLCC
(Pb-free)
N20.35
HI9P0201-5
0 to 75
16 Ld SOIC
M16.15
HI9P0201-5Z
(Note)
0 to 75
16 Ld SOIC
(Pb-free)
M16.15
HI9P0201-9
-40 to 85
16 Ld SOIC
HI9P0201-9Z
(Note)
-40 to 85
16 Ld SOIC
(Pb-free)
VREF
INPUT
SOURCE
LOGIC
INPUT
GATE
REFERENCE,
LEVEL SHIFTER,
AND DRIVER
SWITCH
CELL
GATE
DRAIN
OUTPUT
V-
TRUTH TABLE
LOGIC
HI-200
HI-201
M16.15
0
ON
ON
M16.15
1
OFF
OFF
*Pb-free PDIPs can be used for through hole wave solder
processing only. They are not intended for use in Reflow solder
processing applications.
NOTE: Intersil Pb-free products employ special Pb-free material sets;
molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both
SnPb and Pb-free soldering operations. Intersil Pb-free products are
MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. Pb-free
PDIPs can be used for through hole wave solder processing only. They
are not intended for use in Reflow solder processing applications.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-352-6832 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 1999, 2001, 2004, 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
