SN5400, SN54LS00, SN54S00
SN7400, SN74LS00, SN74S00
QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATES
SDLS025B − DECEMBER 1983 − REVISED OCTOBER 2003
D Package Options Include Plastic
Small-Outline (D, NS, PS), Shrink
Small-Outline (DB), and Ceramic Flat (W)
Packages, Ceramic Chip Carriers (FK), and
Standard Plastic (N) and Ceramic (J) DIPs
SN5400 . . . J PACKAGE
SN54LS00, SN54S00 . . . J OR W PACKAGE
SN7400, SN74S00 . . . D, N, OR NS PACKAGE
SN74LS00 . . . D, DB, N, OR NS PACKAGE
(TOP VIEW)
1A
1B
1Y
2A
2B
2Y
GND
1
14
2
13
3
12
4
11
5
10
6
9
7
8
VCC
4B
4A
4Y
3B
3A
3Y
2
13
3
12
VCC
2Y
2A
2B
4
11
5
10
6
9
7
8
1
8
2
7
3
6
4
5
VCC
2B
2A
2Y
SN54LS00, SN54S00 . . . FK PACKAGE
(TOP VIEW)
1B
1A
NC
VCC
4B
14
SN74LS00, SN74S00 . . . PS PACKAGE
(TOP VIEW)
4Y
4B
4A
GND
3B
3A
3Y
1Y
NC
2A
NC
2B
4
3
2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
4A
NC
4Y
NC
3B
2Y
GND
NC
3Y
3A
1
Positive-NAND Gate in Small-Outline (PS)
Package
1A
1B
1Y
GND
SN5400 . . . W PACKAGE
(TOP VIEW)
1A
1B
1Y
D Also Available as Dual 2-Input
NC − No internal connection
description/ordering information
These devices contain four independent 2-input NAND gates. The devices perform the Boolean function
Y = A • B or Y = A + B in positive logic.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2003, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
On products compliant to MILĆPRFĆ38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
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