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74ACT823D
54ACT 74ACT823 9-Bit D Flip-Flop General Description Features The ’ACT823 is a 9-bit buffered register It features Clock Enable and Clear which are ideal for parity bus interfacing in high performance microprogramming systems The ’ACT823 offers noninverting outputs and is fully compatible with AMD’s Am29823 Y Y Y Y Outputs source sink 24 mA TRI-STATE outputs for bus interfacing Inputs and outputs are on opposite sides ’ACT823 has TTL-compatible inputs Logic Symbols Connection Diagrams IEEE IEC Pin Assignment for DIP Flatpak and SOIC TL F 9894–1 TL F 9894 – 2 TL F 9894 – 3 Pin Assignment for LCC Pin Names Description D0 – D8 O0 – O8 OE CLR CP EN Data Inputs Data Outputs Output Enable Clear Clock Input Clock Enable TL F 9894 – 4 FACTTM is a trademark of National Semiconductor Corporation TRI-STATE is a registered trademark of National Semiconductor Corporation C1995 National Semiconductor Corporation TL F 9894 RRD-B30M75 Printed in U S A 54ACT 74ACT823 9-Bit D Flip-Flop March 1993 Absolute Maximum Ratings (Note 1) Recommended Operating Conditions If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Supply Voltage (VCC) ’ACT Input Voltage (VI) b 0 5V to 7 0V Supply Voltage (VCC) DC Input Diode Current (IIK) b 20 mA VI e b0 5V a 20 mA VI e VCC a 0 5V b 0 5V to VCC a 0 5V DC Input Voltage (VI) DC Output Diode Current (IOK) b 20 mA VO e b0 5V a 20 mA VO e VCC a 0 5V b 0 5V to VCC a 0 5V DC Output Voltage (VO) g 50 mA DC Output Source or Sink Current (IO) DC VCC or Ground Current g 50 mA per Output Pin (ICC or IGND) b 65 C to a 150 C Storage Temperature (TSTG) Junction Temperature (TJ) CDIP 175 C PDIP 140 C 4 5V to 5 5V 0V to VCC 0V to VCC Output Voltage (VO) Operating Temperature (TA) 74ACT 54ACT b 40 C to a 85 C b 55 C to a 125 C Minimum Input Edge Rate (DV Dt) ’ACT Devices VIN from 0 8V to 2 0V VCC 4 5V 5 5V 125 mV ns Note 1 Absolute maximum ratings are those values beyond which damage to the device may occur The databook specifications should be met without exception to ensure that the system design is reliable over its power supply temperature and output input loading variables National does not recommend operation of FACT TM circuits outside databook specifications DC Electrical Characteristics 74ACT 54ACT 74ACT TA e TA e b 55 C to a 125 C b 40 C to a 85 C Units Parameter VCC (V) VIH Minimum High Level Input Voltage 45 55 15 15 20 20 20 20 20 20 V VOUT e 0 1V or VCC b0 1V VIL Maximum Low Level Input Voltage 45 45 15 15 08 08 08 08 08 08 V VOUT e 0 1V or VCC b0 1V VOH Minimum High Level 45 4 49 5 49 44 54 44 54 44 54 V IOUT e b50 mA 3 86 4 86 3 70 4 70 3 76 4 76 V 01 01 01 01 01 01 V 45 55 0 36 0 36 0 50 0 50 0 44 0 44 V 55 g0 1 g1 0 g1 0 mA VI e VCC GND 55 g0 5 g 10 0 g5 0 mA VI e VIL VIH VO e VCC GND Symbol TA e 25 C Typ 45 VOL Maximum Low Level Output Voltage 45 55 0 001 0 001 Conditions Guaranteed Limits VIN e VIL or VIH b 24 mA IOH b 24 mA IOUT e 50 mA VIN e VIL or VIH IOL 24 mA 24 mA IIN Maximum Input Leakage Current IOZ Maximum TRI-STATE Current ICCT Maximum ICC Input 55 16 15 mA IOLD Minimum Dynamic Output Current 55 50 75 mA VI e VCC b2 1V VOLD e 1 65V Max 55 b 50 b 75 mA VOHD e 3 85V Min 160 80 mA VIN e VCC or GND IOHD ICC Maximum Quiescent Supply Current 06 55 80 All outputs loaded thresholds on input associated with output under test Maximum test duration 2 0 ms one output loaded at a time Note ICC limit for 54ACT 25 C is identical to 74ACT 25 C 3
NS
National Semiconductor Corporation 日本ではナショセミと略称されていたが2011年9月23日、米TI社に買収され、同社のシリコンバレー部門となった。
TI
Texas Instruments Incorporated
U.S.A
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