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部品型式

74FCT543ATSO

製品説明
仕様・特性

IDT74FCT543AT/CT/DT FAST CMOS OCTAL LATCHED TRANSCEIVER INDUSTRIAL TEMPERATURE RANGE FAST CMOS OCTAL LATCHED TRANSCEIVER IDT74FCT543AT/CT/DT FEATURES: DESCRIPTION: • • • • The FCT543T is a non-inverting octal transceiver built using an advanced dual metal CMOS technology. This device contains two sets of eight D-type latches with separate input and output controls for each set. For data flow from A to B, for example, the A-to-B Enable (CEAB) input must be low in order to enter data from A0–A7 or to take data from B0–B7, as indicated in the Function Table. With CEAB low, a low signal on the A-to-B Latch Enable (LEAB) input makes the A-to-B latches transparent; a subsequent low-tohigh transition of the LEAB signal puts the A latches in the storage mode and their outputs no longer change with the A inputs. With CEAB and OEAB both low, the 3-state B output buffers are active and reflect the data present at the output of the A latches. Control of data from B to A is similar, but uses the CEBA, LEBA and OEBA inputs. • • • • A, C, and D grades Low input and output leakage ≤1µA (max.) CMOS power levels True TTL input and output compatibility: – VOH = 3.3V (typ.) – VOL = 0.3V (typ.) High Drive outputs (-15mA IOH, 64mA IOL) Meets or exceeds JEDEC standard 18 specifications Power off disable outputs permit "live insertion" Available in SOIC and QSOP packages FUNCTIONAL BLOCK DIAGRAM DETAIL A D Q B0 LE Q A0 D LE A1 B1 A2 B2 A3 A4 B3 DETAIL A x 7 B4 A5 B5 A6 B6 A7 B7 OEBA OEAB CEBA LEBA CEAB LEAB The IDT logo is a registered trademark of Integrated Device Technology, Inc. INDUSTRIAL TEMPERATURE RANGE © 2006 Integrated Device Technology, Inc. OCTOBER 2008 DSC-5489/6 IDT74FCT543AT/CT/DT FAST CMOS OCTAL LATCHED TRANSCEIVER INDUSTRIAL TEMPERATURE RANGE FUNCTION TABLE(1, 2) For A-to-B (Symmetric with B-to-A) CEAB H X X L L Inputs LEAB X H X L H OEAB X X H L L Latch Status A-to-B Storing Storing X Transparent Storing Output Buffers B0–B7 High Z X High Z Current A Inputs Previous* A Inputs NOTES: 1. * Before LEAB LOW-to-HIGH Transition H = HIGH Voltage Level L = LOW Voltage Level X = Don’t Care 2. A-to-B data flow shown; B-to-A flow control is the same, except using CEBA, LEBA and OEBA. DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Industrial: TA = –40°C to +85°C, VCC = 5.0V ±5% Symbol Test Conditions(1) Parameter Min. Typ.(2) Max. Unit VIH Input HIGH Level Guaranteed Logic HIGH Level 2 — — V VIL Input LOW Level Guaranteed Logic LOW Level — — 0.8 V IIH Input HIGH Current(4) VCC = Max. VI = 2.7V — — ±1 µA IIL Input LOW Current(4) VCC = Max. VI = 0.5V — — ±1 µA IOZH High Impedance Output Current VCC = Max VO = 2.7V — — ±1 µA IOZL (3-State output pins)(4) VO = 0.5V — — ±1 II VIK VH Input HIGH Current(4) Clamp Diode Voltage Input Hysteresis VCC = Max., VI = VCC (Max.) VCC = Min, IIN = -18mA — — — — –0.7 200 ±1 –1.2 — µA V mV ICC Quiescent Power Supply Current VCC = Max., VIN = GND or VCC — 0.01 1 mA Min. 2.4 Typ.(2) 3.3 Max. — Unit V — OUTPUT DRIVE CHARACTERISTICS Symbol VOH Parameter Output HIGH Voltage VCC = Min Test Conditions(1) IOH = –8mA VIN = VIH or VIL IOH = –15mA 2 3 — IOL = 64mA — 0.3 0.55 V –60 –120 –225 mA — — ±1 µA VOL Output LOW Voltage IOS Short Circuit Current VCC = Min VIN = VIH or VIL VCC = Max., VO = GND(3) IOFF Input/Output Power Off Leakage(5) VCC = 0V, VIN or VO ≤ 4.5V NOTES: 1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25°C ambient. 3. Not more than one output should be tested at one time. Duration of the test should not exceed one second. 4. The test limit for this parameter is ±5µA at TA = –55°C. 5. This parameter is guaranteed but not tested. 3

ブランド

AMD

会社名

Advanced Micro Devices, Inc

本社国名

U.S.A

事業概要

コンピュータ業界、グラフィックス、家電業界向けマイクロプロセッサ・ソリューションの開発・製造・販売およびサポート

供給状況

 
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