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CY7C344-15JC

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仕様・特性

USE ULTRA37000TM FOR ALL NEW DESIGNS CY7C344 32-Macrocell MAX® EPLD Features densest EPLD of this size. Eight dedicated inputs and 16 bidirectional I/O pins communicate to one logic array block. In the CY7C344 LAB there are 32 macrocells and 64 expander product terms. When an I/O macrocell is used as an input, two expanders are used to create an input path. Even if all of the I/O pins are driven by macrocell registers, there are still 16 “buried” registers available. All inputs, macrocells, and I/O pins are interconnected within the LAB. • High-performance, high-density replacement for TTL, 74HC, and custom logic • 32 macrocells, 64 expander product terms in one LAB • 8 dedicated inputs, 16 I/O pins • 0.8-micron double-metal CMOS EPROM technology The speed and density of the CY7C344 makes it a natural for all types of applications. With just this one device, the designer can implement complex state machines, registered logic, and combinatorial “glue” logic, without using multiple chips. This architectural flexibility allows the CY7C344 to replace multichip TTL solutions, whether they are synchronous, asynchronous, combinatorial, or all three. • 28-pin, 300-mil DIP, cerDIP or 28-pin HLCC, PLCC package Functional Description Available in a 28-pin, 300-mil DIP or windowed J-leaded ceramic chip carrier (HLCC), the CY7C344 represents the Logic Block Diagram [1] Pin Configurations HLCC Top View 15(22) INPUT INPUT 15(23) INPUT INPUT/CLK 2(9) 27(6) INPUT INPUT 13(20) 28(7) INPUT INPUT 14(21) MACROCELL 8 MACROCELL 10 MACROCELL 12 MACROCELL 14 MACROCELL 16 3(10) I/O 4(11) MACROCELL 5 I I/O 5(12) MACROCELL 7 O I/O 6(13) MACROCELL 3 G L O I/O 9(16) C O I/O B A I/O 11(18) N T I/O 12(19) I/O 17(24) R I/O 18(25) O L MACROCELL 11 MACROCELL 13 L MACROCELL 15 B MACROCELL 17 MACROCELL 20 U S MACROCELL 19 MACROCELL 21 I/O 19(26) I/O 20(27) MACROCELL 24 MACROCELL 23 MACROCELL 26 MACROCELL 25 I/O I/O I/O INPUT INPUT INPUT INPUT I/O MACROCELL 27 I/O MACROCELL 29 I/O 25(4) MACROCELL 32 MACROCELL 31 I/O INPUT INPUT/CLK I/O I/O I/O I/O VCC GND I/O I/O I/O I/O INPUT INPUT 24(3) MACROCELL 30 12 13 14 1516 1718 CerDIP Top View 23(2) MACROCELL 28 26(5) 64 EXPANDER PRODUCT TERM ARRAY 25 24 23 22 21 20 19 10(17) MACROCELL 9 MACROCELL 18 MACROCELL 22 I/O I/O I/O VCC GND I/O I/O I/O I/O MACROCELL 6 MACROCELL 1 5 6 7 8 9 10 11 V CC GND I/O I/O MACROCELL 4 4 3 2 1 28 27 26 I/O INPUT INPUT INPUT INPUT/CLK I/O I/O I/O I/O MACROCELL 2 1(8) 32 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 INPUT INPUT I/O I/O I/O I/O VCC GND I/O I/O I/O I/O INPUT INPUT Selection Guide 7C344-15 Maximum Access Time Maximum Operating Current 7C344-20 7C344-25 15 Commercial 20 25 ns 200 200 200 mA Military 220 220 Industrial Maximum Standby Current Unit 220 220 220 Commercial 150 150 150 170 170 170 170 Military Industrial 170 mA Note: 1. Numbers in () refer to J-leaded packages. Cypress Semiconductor Corporation Document #: 38-03006 Rev. *B • 3901 North First Street • San Jose, CA 95134 • 408-943-2600 Revised June 6, 2005

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