a
FEATURES
Specified for VDD of 3 V to 5.5 V
Read-Only Operation
AD7854–200 kSPS; AD7854L–100 kSPS
System and Self-Calibration
Low Power
Normal Operation
AD7854: 15 mW (VDD = 3 V)
AD7854L: 5.5 mW (V DD = 3 V)
Automatic Power-Down After Conversion (25 W)
AD7854: 1.3 mW 10 kSPS
AD7854L: 650 W 10 kSPS
Flexible Parallel Interface
12-Bit Parallel/8-Bit Parallel (AD7854)
28-Lead DIP, SOIC and SSOP Packages (AD7854)
APPLICATIONS
Battery-Powered Systems (Personal Digital Assistants,
Medical Instruments, Mobile Communications)
Pen Computers
Instrumentation and Control Systems
High Speed Modems
3 V to 5 V Single Supply, 200 kSPS
12-Bit Sampling ADCs
AD7854/AD7854L
FUNCTIONAL BLOCK DIAGRAM
AGND
AVDD
AD7854/AD7854L
AIN(+)
T/H
AIN(–)
DVDD
2.5V
REFERENCE
REFIN/
REFOUT
COMP
BUF
DGND
CREF1
CHARGE
REDISTRIBUTION
DAC
CLKIN
SAR + ADC
CONTROL
CREF2
CALIBRATION
MEMORY
AND CONTROLLER
CONVST
BUSY
PARALLEL INTERFACE/CONTROL REGISTER
DB11–DB0
CS
RD
WR
HBEN
GENERAL DESCRIPTION
PRODUCT HIGHLIGHTS
The AD7854/AD7854L is a high speed, low power, 12-bit ADC
that operates from a single 3 V or 5 V power supply, the
AD7854 being optimized for speed and the AD7854L for low
power. The ADC powers up with a set of default conditions at
which time it can be operated as a read-only ADC. The ADC
contains self-calibration and system calibration options to ensure accurate operation over time and temperature and has a
number of power-down options for low power applications.
1. Operation with either 3 V or 5 V power supplies.
The AD7854 is capable of 200 kHz throughput rate while the
AD7854L is capable of 100 kHz throughput rate. The input
track-and-hold acquires a signal in 500 ns and features a pseudodifferential sampling scheme. The AD7854 and AD7854L input
voltage range is 0 to VREF (unipolar) and –VREF/2 to +VREF/2,
centered at VREF/2 (bipolar). The coding is straight binary in
unipolar mode and twos complement in bipolar mode. Input
signal range is to the supply and the part is capable of converting full-power signals to 100 kHz.
2. Flexible power management options including automatic
power-down after conversion. By using the power management options a superior power performance at slower
throughput rates can be achieved:
AD7854: 1 mW typ @ 10 kSPS
AD7854L: 1 mW typ @ 20 kSPS
3. Operates with reference voltages from 1.2 V to AVDD.
4. Analog input ranges from 0 V to AVDD.
5. Self-calibration and system calibration.
6. Versatile parallel I/O port.
7. Lower power version AD7854L.
CMOS construction ensures low power dissipation of typically
5.4 mW for normal operation and 3.6 µW in power-down mode.
The part is available in 28-lead, 0.6 inch wide dual-in-line package (DIP), 28-lead small outline (SOIC) and 28-lead small
shrink outline (SSOP) packages.
See Page 27 for data sheet index.
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
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Tel: 781/329-4700
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© Analog Devices, Inc., 2000
