FINAL
Am27C64
64 Kilobit (8 K x 8-Bit) CMOS EPROM
DISTINCTIVE CHARACTERISTICS
s Fast access time
s Latch-up protected to 100 mA from –1 V to
VCC + 1 V
— Speed options as fast as 45 ns
s High noise immunity
s Low power consumption
s Versatile features for simple interfacing
— 20 µA typical CMOS standby current
s JEDEC-approved pinout
— Both CMOS and TTL input/output compatibility
s Single +5 V power supply
— Two line control functions
s Standard 28-pin DIP, PDIP, and 32-pin PLCC
packages
s ±10% power supply tolerance standard
s 100% Flashrite™ programming
— Typical programming time of 1 second
GENERAL DESCRIPTION
The Am27C64 is a 64-Kbit, ultraviolet erasable programmable read-only memory. It is organized as 8K
words by 8 bits per word, operates from a single +5 V
supply, has a static standby mode, and features fast
single address location programming. Products are
available in windowed ceramic DIP packages, as well
as plastic one time programmable (OTP) PDIP and
PLCC packages.
Data can be typically accessed in less than 45 ns, allowing high-performance microprocessors to operate
without any WAIT states. The device offers separate
Output Enable (OE#) and Chip Enable (CE#) controls,
thus eliminating bus contention in a multiple bus microprocessor system.
AMD’s CMOS process technology provides high
speed, low power, and high noise immunity. Typical
power consumption is only 80 mW in active mode, and
100 µW in standby mode.
All signals are TTL levels, including programming signals. Bit locations may be programmed singly, in
blocks, or at random. The device supports AMD’s
Flashrite programming algorithm (100 µs pulses), resulting in a typical programming time of 1 second.
BLOCK DIAGRAM
VCC
VSS
Data Outputs
DQ0–DQ7
VPP
CE#
PGM#
A0–A12
Address
Inputs
Output Enable
Chip Enable
and
Prog Logic
Output
Buffers
Y
Decoder
OE#
Y
Gating
X
Decoder
65,538
Bit Cell
Matrix
11419E-1
Publication# 11419 Rev: E Amendment/0
Issue Date: May 1998
