IDT74LVC16374A
3.3V CMOS 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP
INDUSTRIAL TEMPERATURE RANGE
3.3V CMOS 16-BIT
IDT74LVC16374A
EDGE-TRIGGERED D-TYPE
FLIP-FLOP WITH 3-STATE OUTPUTS,
5 VOLT TOLERANT I/O
FEATURES:
DESCRIPTION:
• Typical tSK(o) (Output Skew) < 250ps
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
• VCC = 3.3V ± 0.3V, Normal Range
• VCC = 2.7V to 3.6V, Extended Range
• CMOS power levels (0.4μ W typ. static)
μ
• All inputs, outputs, and I/O are 5V tolerant
• Supports hot insertion
• Available in SSOP, TSSOP, and TVSOP packages
The LVC16374A 16-bit edge-triggered D-type flip-flop is built using
advanced dual metal CMOS technology. This high-speed, low-power
register is ideal for use as a buffer register for data synchronization and
storage. The Output Enable (OE) and clock (CLK) controls are organized
to operate this device as two 8-bit registers or one 16-bit register with
common clock. Flow-through organization of signal pins simplifies layout.
All inputs are designed with hysteresis for improved noise margin.
All pins of the LVC16374A can be driven from either 3.3V or 5V devices.
This feature allows the use of this device as a translator in a mixed 3.3V/
5V supply system.
The LVC16374A has been designed with a ±24mA output driver. This
driver is capable of driving a moderate to heavy load while maintaining
speed performance.
DRIVE FEATURES:
• High Output Drivers: ±24mA
• Reduced system switching noise
APPLICATIONS:
• 5V and 3.3V mixed voltage systems
• Data communication and telecommunication systems
FUNCTIONAL BLOCK DIAGRAM
1OE
1CLK
1D1
1
2OE
2CLK
47
D
C
2
25
2D1
48
24
36
D
13
C
1Q1
2Q1
TO SEVEN OTHER CHANNELS
TO SEVEN OTHER CHANNELS
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
JUNE 2006
1
© 2006 Integrated Device Technology, Inc.
DSC-4752/5
