KM44C1000D, KM44V1000D
CMOS DRAM
1M x 4Bit CMOS Dynamic RAM with Fast Page Mode
DESCRIPTION
This is a family of 1,048,576 x 4bit Fast Page Mode CMOS DRAMs. Fast Page Mode offers high speed random access of memory cells
within the same row. Power supply voltage (+5V or +3.3V), access time (-5, -6 or -7), power consumption(Normal or Low power), and
package type (SOJ or TSOP-II) are optional features of this family. All of this family have CAS-before-RAS refresh, RAS-only refresh and
Hidden refresh capabilities. Furthermore, self-refresh operation is available in 3.3V Low power version.
This 1Mx4 Fast Page Mode DRAM family is fabricated using Samsung′s advanced CMOS process to realize high band-width, low power
consumption and high reliability. It may be used as main memory for main frames and mini computers, personal computer and high performance microprocessor systems.
• Fast Page Mode operation
FEATURES
• CAS-before-RAS refresh capability
• Part Identification
• RAS-only and Hidden refresh capability
• Self-refresh capability (3.3V, L-ver only)
- KM44C1000D/D-L(5V, 1K Ref.)
- KM44V1000D/D-L(3.3V, 1K Ref.)
• Fast parallel test mode capability
• TTL(5V)/LVTTL(3.3V) compatible inputs and outputs
• Early write or output enable controlled write
• JEDEC Standard pinout
• Active Power Dissipation
Unit : mW
• Available in 26(20)-pin SOJ 300mil and TSOP(II)
300mil packages
Speed
3.3V
5V
-5
-
470
• Single +5V±10% power supply(5V product)
-6
220
415
• Single +3.3V±0.3V power supply(3.3V product)
-7
200
360
FUNCTIONAL BLOCK DIAGRAM
• Refresh Cycles
KM44C1000D
Refresh
cycle
Normal
Refresh Period
L-ver
1K
16ms
RAS
CAS
W
128ms
KM44V1000D
Control
Clocks
Refresh Timer
Row Decoder
Refresh Control
• Performance Range
Refresh Counter
Speed
tRAC
tCAC
tRC
tPC
Remark
-5
50ns
15ns
90ns
35ns
5V only
-6
60ns
15ns
110n
40ns
5V/3.3V
-7
70ns
20ns
130n
45ns
Memory Array
1,048,576 x4
Cells
Row Address Buffer
A0~A9
5V/3.3V
Col. Address Buffer
Vcc
Vss
VBB Generator
Column Decoder
SAMSUNG ELECTRONICS CO., LTD. reserves the right to
change products and specifications without notice.
Sense Amps & I/O
Part
NO.
Data in
Buffer
DQ0
to
DQ3
Data out
Buffer
OE
