DATA SHEET
MARCH 1999
Revision 1.1
LXT300Z/LXT301Z
Advanced T1/E1 Short-Haul Transceivers
General Description
Features
The LXT300Z and LXT301Z are fully integrated
transceivers for both North American 1.544 Mbps (T1) and
International 2.048 Mbps (E1) applications. They are pin
and functionally compatible with standard LXT300/301
devices, with some circuit enhancements.
• Data recovery and clock recovery functions
The LXT300Z provides receive jitter attenuation starting at
3 Hz, and is microprocessor controllable through a serial
interface. The LXT301Z is pin compatible, but does not
provide jitter attenuation or a serial interface. An advanced
transmit driver architecture provides constant low output
impedance for both marks and spaces, for improved Bit
Error Rate performance over various cable network
configurations. Both transceivers offer a variety of
diagnostic features including transmit and receive
monitoring. Clock inputs may be derived from an on-chip
crystal oscillator or from digital inputs. They use an
advanced double-poly, double-metal CMOS process and
require only a single 5-volt power supply.
• Line driver with constant low mark and space
impedance (3 Ω typical)
Applications
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PCM/Voice Channel Banks
Data Channel Bank/Concentrator
T1/E1 multiplexers
Digital Access and Cross-connect Systems (DACS)
Computer to PBX interfaces (CPI & DMI)
High-speed data transmission lines
Interfacing Customer Premises Equipment to a CSU
Digital Loop Carrier (DLC) terminals
• Receive jitter attenuation starting at 3 Hz exceeds
AT&T Pub 62411, Pub 43801, Pub 43802, ITU
G.703, and ITU G.823 (LXT300Z only)
• Minimum receive signal of 500 mV
• Adaptive and selectable (E1/DSX-1) slicer levels for
improved SNR
• Programmable transmit equalizer shapes pulses to
meet DSX-1 pulse template from 0 to 655 feet or
drive 120 Ω twisted pair or 75 Ω coax cable for E1
• Local and remote loopback functions
• Digital Transmit Driver Monitor
• Digital Receive Monitor with Loss of Signal (LOS)
output and first mark reset
• Receiver jitter tolerance 0.4 UI from 40 kHz to 100
kHz
• Microprocessor controllable (LXT300Z only)
• Compatible with most popular PCM framers
• Available in 28-pin DIP or PLCC
LXT300Z/LXT301Z Block Diagram
MODE
HOST
H/W
INT
SDI
SDO
CS
SCLK
CLKE
EC1
EC2
EC3
RLOOP
LLOOP
TAOS
Constant Impedance
Line Driver
Control
TPOS
TNEG
TCLK
Synchronizer
MCLK
Internal Clock
Generator
XTALIN
XTALOUT
RCLK
RPOS
RNEG
LOS
TTIP
TRING
Equalizer
Data Slicers
Timing
Recovery
Peak
Detector
RTIP
Transmit
Driver
Control
MTIP
RRING
Jitter
Attenuator
Elastic
Store
Data
Latch
Receive
Monitor
MRING
DPM
Refer to www.level1.com for most current information.
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