FINAL
COM’L: -7/10/12/15/20, Q-12/15/20
IND: -12/14/18/24
MACH210A-7/10/12
MACH210-12/15/20
MACH210AQ-12/15/20
Advanced
Micro
Devices
High-Density EE CMOS Programmable Logic
DISTINCTIVE CHARACTERISTICS
44 Pins
64 Macrocells
Peripheral Component Interconnect (PCI)
compliant
7.5 ns tPD Commercial
12 ns tPD Industrial
32 Outputs
133 MHz fCNT
4 “PAL22V16” blocks with buried macrocells
38 Inputs; 210A Inputs have built-in pull-up
resistors
Pin-compatible with MACH110, MACH111,
MACH211, and MACH215
64 Flip-flops; 2 clock choices
GENERAL DESCRIPTION
The MACH210 is a member of AMD’s high-performance
EE CMOS MACH 2 device family. This device has
approximately six times the logic macrocell capability of
the popular PAL22V10 without loss of speed.
The MACH210 consists of four PAL blocks interconnected by a programmable switch matrix. The four PAL
blocks are essentially “PAL22V16” structures complete
with product-term arrays and programmable macrocells, including additional buried macrocells. The switch
matrix connects the PAL blocks to each other and to all
input pins, providing a high degree of connectivity
between the fully-connected PAL blocks. This allows
designs to be placed and routed efficiently.
The MACH210 has two kinds of macrocell: output and
buried. The MACH210 output macrocell provides regis-
tered, latched, or combinatorial outputs with programmable polarity. If a registered configuration is chosen,
the register can be configured as D-type or T-type to
help reduce the number of product terms. The register
type decision can be made by the designer or by the
software. All output macrocells can be connected to an
I/O cell. If a buried macrocell is desired, the internal
feedback path from the macrocell can be used, which
frees up the I/O pin for use as an input.
The MACH210 has dedicated buried macrocells which,
in addition to the capabilities of the output macrocell,
also provide input registers or latches for use in
synchronizing signals and reducing setup time requirements.
Publication# 14128 Rev. I
Issue Date: May 1995
Amendment /0
