MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Octal 3-State Noninverting
Buffer/Line Driver/
Line Receiver
High–Performance Silicon–Gate CMOS
MC54/74HC244A
J SUFFIX
CERAMIC PACKAGE
CASE 732–03
20
1
The MC54/74HC244A is identical in pinout to the LS244. The device
inputs are compatible with standard CMOS outputs; with pullup resistors,
they are compatible with LSTTL outputs.
This octal noninverting buffer/line driver/line receiver is designed to be
used with 3–state memory address drivers, clock drivers, and other
bus–oriented systems. The device has noninverting outputs and two
active–low output enables.
The HC244A is similar in function to the HC240A and HC241A.
N SUFFIX
PLASTIC PACKAGE
CASE 738–03
20
1
DW SUFFIX
SOIC PACKAGE
CASE 751D–04
20
1
•
•
•
•
•
•
1
SD SUFFIX
SSOP PACKAGE
CASE 940C–03
1
Output Drive Capability: 15 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2 to 6 V
Low Input Current: 1 µA
High Noise Immunity Characteristic of CMOS Devices
In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
• Chip Complexity: 136 FETs or 34 Equivalent Gates
DT SUFFIX
TSSOP PACKAGE
CASE 948E–02
20
20
ORDERING INFORMATION
Ceramic
MC54HCXXXAJ
Plastic
MC74HCXXXAN
SOIC
MC74HCXXXADW
SSOP
MC74HCXXXASD
TSSOP
MC74HCXXXADT
LOGIC DIAGRAM
A1
A2
A3
A4
DATA
INPUTS
2
18
4
16
6
14
8
12
PIN ASSIGNMENT
YA1
ENABLE A
YA2
1
20
VCC
A1
NONINVERTING
OUTPUTS
ENABLE B
18
YA1
4
17
B4
YB3
YA4
19
3
A2
YA3
2
YB4
5
16
YA2
B2
B3
B4
11
9
13
7
15
5
17
3
A3
6
15
B3
YB2
7
14
YA3
YB2
A4
8
13
B2
YB1
B1
9
12
YA4
YB3
GND
10
11
B1
YB1
YB4
FUNCTION TABLE
PIN 20 = VCC
PIN 10 = GND
1
ENABLE A
19
ENABLE B
Inputs
Outputs
Enable A,
Enable B
A, B
YA, YB
L
L
H
OUTPUT
ENABLES
L
H
X
L
H
Z
Z = high impedance
2/97
© Motorola, Inc. 1997
1
REV 7
