MC74HC4040A
12-Stage Binary Ripple
Counter
High−Performance Silicon−Gate CMOS
The MC74C4040A is identical in pinout to the standard CMOS
MC14040. The device inputs are compatible with standard CMOS
outputs; with pullup resistors, they are compatible with LSTTL
outputs.
This device consists of 12 master−slave flip−flops. The output of
each flip−flop feeds the next and the frequency at each output is half of
that of the preceding one. The state counter advances on the
negative−going edge of the Clock input. Reset is asynchronous and
active−high.
State changes of the Q outputs do not occur simultaneously because
of internal ripple delays. Therefore, decoded output signals are subject
to decoding spikes and may have to be gated with the Clock of the
HC4040A for some designs.
http://onsemi.com
MARKING
DIAGRAMS
16
1
16
SOIC−16
D SUFFIX
CASE 751B
16
1
Output Drive Capability: 10 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1 mA
High Noise Immunity Characteristic of CMOS Devices
In Compliance With JEDEC Standard No. 7A Requirements
Chip Complexity: 398 FETs or 99.5 Equivalent Gates
These Devices are Pb−Free, Halogen Free and are RoHS Compliant
NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
MC74HC4040AN
AWLYYWWG
1
Features
•
•
•
•
•
•
•
•
•
PDIP−16
N SUFFIX
CASE 648
16
HC4040AG
AWLYWW
1
16
HC40
40A
ALYWG
G
TSSOP−16
DT SUFFIX
CASE 948F
16
1
1
16
SOEIAJ−16
F SUFFIX
CASE 966
16
1
74HC4040A
ALYWG
1
A
L, WL
Y, YY
W, WW
G or G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
© Semiconductor Components Industries, LLC, 2013
June, 2013 − Rev. 8
1
Publication Order Number:
MC74HC4040A/D
