HCC/HCF4017B
HCC/HCF4022B
COUNTERS/DIVIDERS
4017B DECADE COUNTER WITH 10
DECODED OUTPUTS
4022B OCTAL COUNTER WITH 8
DECODED OUTPUTS
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FULLY STATIC OPERATION
MEDIUM SPEED OPERATION-12MHz (typ.) AT
VDD = 10V
STANDARDIZED SYMMETRICAL OUTPUT
CHARACTERISTICS
QUIESCENT CURRENT SPECIFIED TO 20V
FOR HCC DEVICE
INPUT CURRENT OF 100nA AT 18V AND 25°C
FOR HCC DEVICE
100% TESTED FOR QUIESCENT CURRENT
5V, 10V, AND 15V PARAMETRIC RATINGS
MEETS ALL REQUIREMENTS OF JEDEC TENTATIVE STANDARD N° 13A, ”STANDARD
SPECIFICATIONS FOR DESCRIPTION OF ”B”
SERIES CMOS DEVICES”
EY
(Plastic Package)
F
(Ceramic Frit Seal Package)
M1
(Micro Package)
C1
(Plastic Chip Carrier)
ORDER CODES :
HCC40XXBF
HCF40XXBM1
HCF40XXBEY
HCF40XXBC1
PIN CONNECTIONS
DESCRIPTION
The HCC4017B/4022B (extended temperature
range) and HCF4017B/4022B (intermediate temperature range) are monolithic integrated circuits,
available in 16-lead dual in-line plastic or ceramic
package and plastic micro package.
The HCC/HCF4017B and HCC/HCF4022B are 5stage and 4-stage Johnson counters having 10 and
8 decoded outputs, respectively. Inputs include a
CLOCK, a RESET, and a CLOCK INHIBIT signal.
Schmitt trigger action in the CLOCK input circuit provides pulse shaping that allows unlimited clock input
pulse rise and fall times. These counters are advanced one count at the positive clock signal transition if the CLOCK INHIBIT signal is low. Counter
advancement via the clock line is inhibited when the
CLOCK INHIBIT signal is high. A high RESET signal
clears the counter to its zero count. Use of the
Johnson decade-counter configuration permits
high-speed operation, 2-input decimal-decode gating, and spike-free decoded outputs. Anti-lock gating is provided, thus assuring proper counting
sequence. The decoded outputs are normally low
and go high only at their respective decoded time
slot. Each decoded output remains high for one full
clock cycle. A CARRY-OUT signal completes one
June 1989
4017B
4022B
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