4 Mbit (512K x8) SuperFlash EEPROM
SST28SF040A / SST28VF040A
EOL Data Sheet
SST28SF / VF040A4Mb (x8)
Byte-Program, Small Erase Sector flash memories
FEATURES:
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PRODUCT DESCRIPTION
• Fast Read Access Time
– 4.5-5.5V-only operation: 90 and 120 ns
– 2.7-3.6V operation: 150 and 200 ns
• Latched Address and Data
• Hardware and Software Data Protection
– 7-Read-Cycle-Sequence Software Data
Protection
• End-of-Write Detection
– Toggle Bit
– Data# Polling
• TTL I/O Compatibility
• JEDEC Standard
– Flash EEPROM Pinouts
• Packages Available
– 32-lead PLCC
– 32-lead TSOP (8mm x 20mm)
– 32-pin PDIP
LE
• Single Voltage Read and Write Operations
– 4.5-5.5V-only for SST28SF040A
– 2.7-3.6V for SST28VF040A
• Superior Reliability
– Endurance: 100,000 Cycles (typical)
– Greater than 100 years Data Retention
• Memory Organization: 512K x8
• Sector-Erase Capability: 256 Bytes per Sector
• Low Power Consumption
– Active Current: 15 mA (typical) for 5.0V and
10 mA (typical) for 2.7-3.6V
– Standby Current: 5 µA (typical)
• Fast Sector-Erase/Byte-Program Operation
– Byte-Program Time: 35 µs (typical)
– Sector-Erase Time: 2 ms (typical)
– Complete Memory Rewrite: 20 sec (typical)
OB
The SST28SF/VF040A are 512K x8 bit CMOS SectorErase, Byte-Program EEPROMs. The SST28SF/VF040A
are manufactured using SST’s proprietary, high performance CMOS SuperFlash EEPROM Technology. The
split-gate cell design and thick-oxide tunneling injector
attain better reliability and manufacturability compared with
alternative approaches. The SST28SF/VF040A erase and
program with a single power supply. The SST28SF/
VF040A conform to JEDEC standard pinouts for byte wide
memories and are compatible with existing industry standard flash EEPROM pinouts.
Featuring high performance programming, the SST28SF/
VF040A typically Byte-Program in 35 µs. The SST28SF/
VF040A typically Sector-Erase in 2 ms. Both Program and
Erase times can be optimized using interface features such
as Toggle bit or Data# Polling to indicate the completion of
the Write cycle. To protect against an inadvertent write, the
SST28SF/VF040A have on chip hardware and Software
Data Protection schemes. Designed, manufactured, and
tested for a wide spectrum of applications, the SST28SF/
VF040A are offered with a guaranteed sector endurance of
10,000 cycles. Data retention is rated greater than 100
years.
The SST28SF/VF040A are best suited for applications that
require re-programmable nonvolatile mass storage of program, configuration, or data memory. For all system appli©2007 Silicon Storage Technology, Inc.
S71077-06-EOL 3/07
1
cations, the SST28SF/VF040A significantly improve
performance and reliability, while lowering power consumption when compared with floppy diskettes or EPROM
approaches. Flash EEPROM technology makes possible
convenient and economical updating of codes and control
programs on-line. The SST28SF/VF040A improve flexibility, while lowering the cost of program and configuration
storage application.
The functional block diagram shows the functional blocks of
the SST28SF/VF040A. Figures 1, 2, and 3 show the pin
assignments for the 32-lead PLCC, 32-lead TSOP and 32,
pin PDIP packages. Pin descriptions and operation modes
are described in Tables 2 through 5.
Device Operation
Commands are used to initiate the memory operation functions of the device. Commands are written to the device
using standard microprocessor write sequences. A command is written by asserting WE# low while keeping CE#
low. The address bus is latched on the falling edge of WE#
or CE#, whichever occurs last. The data bus is latched on
the rising edge of WE# or CE#, whichever occurs first.
Note, during the Software Data Protection sequence the
addresses are latched on the rising edge of OE# or CE#,
whichever occurs first.
The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc.
SSF is a trademark of Silicon Storage Technology, Inc.
These specifications are subject to change without notice.
